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authorSam Day <[email protected]>2024-05-06 10:26:58 +0000
committerCaleb Connolly <[email protected]>2024-07-05 12:04:46 +0200
commit9b3a9f896e66f1feacd7e4f1d7d4654f9ec25420 (patch)
tree68f60df2485aec31643c5f5db67a33c3a288a988 /drivers
parent4fb4bb08e7a262ece8fba988d7d6dbcb1c477c3f (diff)
ehci: msm: bring up iface + core clocks
This seems to be necessary on my samsung-a5. Without this patch, the first access of EHCI registers causes a bus stall and subsequent reset. I am unsure why this wasn't already necessary for db410c, perhaps those clocks are already enabled on boot. Reviewed-by: Caleb Connolly <[email protected]> Signed-off-by: Sam Day <[email protected]> Signed-off-by: Caleb Connolly <[email protected]>
Diffstat (limited to 'drivers')
-rw-r--r--drivers/usb/host/ehci-msm.c37
1 files changed, 35 insertions, 2 deletions
diff --git a/drivers/usb/host/ehci-msm.c b/drivers/usb/host/ehci-msm.c
index a081f71b187..ff336082e3a 100644
--- a/drivers/usb/host/ehci-msm.c
+++ b/drivers/usb/host/ehci-msm.c
@@ -7,7 +7,9 @@
* Based on Linux driver
*/
+#include <clk.h>
#include <dm.h>
+#include <dm/device_compat.h>
#include <dm/lists.h>
#include <errno.h>
#include <usb.h>
@@ -24,6 +26,8 @@ struct msm_ehci_priv {
struct usb_ehci *ehci; /* Start of IP core*/
struct ulpi_viewport ulpi_vp; /* ULPI Viewport */
struct phy phy;
+ struct clk iface_clk;
+ struct clk core_clk;
};
static int msm_init_after_reset(struct ehci_ctrl *dev)
@@ -52,20 +56,46 @@ static int ehci_usb_probe(struct udevice *dev)
struct ehci_hcor *hcor;
int ret;
+ ret = clk_get_by_name(dev, "core", &p->core_clk);
+ if (ret) {
+ dev_err(dev, "Failed to get core clock: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_get_by_name(dev, "iface", &p->iface_clk);
+ if (ret) {
+ dev_err(dev, "Failed to get iface clock: %d\n", ret);
+ return ret;
+ }
+
+ ret = clk_prepare_enable(&p->core_clk);
+ if (ret)
+ return ret;
+
+ ret = clk_prepare_enable(&p->iface_clk);
+ if (ret)
+ goto cleanup_core;
+
hccr = (struct ehci_hccr *)((phys_addr_t)&ehci->caplength);
hcor = (struct ehci_hcor *)((phys_addr_t)hccr +
HC_LENGTH(ehci_readl(&(hccr)->cr_capbase)));
ret = generic_setup_phy(dev, &p->phy, 0);
if (ret)
- return ret;
+ goto cleanup_iface;
ret = board_usb_init(0, plat->init_type);
if (ret < 0)
- return ret;
+ goto cleanup_iface;
return ehci_register(dev, hccr, hcor, &msm_ehci_ops, 0,
plat->init_type);
+
+cleanup_iface:
+ clk_disable_unprepare(&p->iface_clk);
+cleanup_core:
+ clk_disable_unprepare(&p->core_clk);
+ return ret;
}
static int ehci_usb_remove(struct udevice *dev)
@@ -81,6 +111,9 @@ static int ehci_usb_remove(struct udevice *dev)
/* Stop controller. */
clrbits_le32(&ehci->usbcmd, CMD_RUN);
+ clk_disable_unprepare(&p->iface_clk);
+ clk_disable_unprepare(&p->core_clk);
+
ret = generic_shutdown_phy(&p->phy);
if (ret)
return ret;