diff options
| author | Marek Vasut <[email protected]> | 2024-12-19 22:21:42 +0100 |
|---|---|---|
| committer | Marek Vasut <[email protected]> | 2024-12-29 16:55:32 +0100 |
| commit | b35ebf4fee703b842522768ac3cd56e57141f845 (patch) | |
| tree | 114154ba73e17ed844daae814a39c8b6e297ce7f /drivers | |
| parent | da5d84ebc5cc2786132069c5d999ff0e2e961367 (diff) | |
net: rswitch: Simplify code using clrsetbits_le32()
Use clrsetbits_le32() to make this complicated construct simpler.
No functional change.
Signed-off-by: Marek Vasut <[email protected]>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/net/rswitch.c | 14 |
1 files changed, 6 insertions, 8 deletions
diff --git a/drivers/net/rswitch.c b/drivers/net/rswitch.c index 54ef9a55e3e..58fd55c996f 100644 --- a/drivers/net/rswitch.c +++ b/drivers/net/rswitch.c @@ -417,7 +417,6 @@ static int rswitch_mii_read_c45(struct mii_dev *miidev, int phyad, int devad, in struct rswitch_port_priv *priv = miidev->priv; struct rswitch_etha *etha = &priv->etha; int val; - int reg; /* Change to disable mode */ rswitch_etha_change_mode(priv, EAMC_OPC_DISABLE); @@ -426,9 +425,9 @@ static int rswitch_mii_read_c45(struct mii_dev *miidev, int phyad, int devad, in rswitch_etha_change_mode(priv, EAMC_OPC_CONFIG); /* Enable Station Management clock */ - reg = readl(etha->addr + MPIC); - reg &= ~MPIC_PSMCS_MASK & ~MPIC_PSMHT_MASK; - writel(reg | MPIC_MDC_CLK_SET, etha->addr + MPIC); + clrsetbits_le32(etha->addr + MPIC, + MPIC_PSMCS_MASK | MPIC_PSMHT_MASK, + MPIC_MDC_CLK_SET); /* Set Station Management Mode : Clause 45 */ setbits_le32(etha->addr + MPSM, MPSM_MFF_C45); @@ -449,7 +448,6 @@ int rswitch_mii_write_c45(struct mii_dev *miidev, int phyad, int devad, int rega { struct rswitch_port_priv *priv = miidev->priv; struct rswitch_etha *etha = &priv->etha; - int reg; /* Change to disable mode */ rswitch_etha_change_mode(priv, EAMC_OPC_DISABLE); @@ -458,9 +456,9 @@ int rswitch_mii_write_c45(struct mii_dev *miidev, int phyad, int devad, int rega rswitch_etha_change_mode(priv, EAMC_OPC_CONFIG); /* Enable Station Management clock */ - reg = readl(etha->addr + MPIC); - reg &= ~MPIC_PSMCS_MASK & ~MPIC_PSMHT_MASK; - writel(reg | MPIC_MDC_CLK_SET, etha->addr + MPIC); + clrsetbits_le32(etha->addr + MPIC, + MPIC_PSMCS_MASK | MPIC_PSMHT_MASK, + MPIC_MDC_CLK_SET); /* Set Station Management Mode : Clause 45 */ setbits_le32(etha->addr + MPSM, MPSM_MFF_C45); |