clk: rockchip: rk3576: Add CLK_REF_USB3OTGx support

The CLK_REF_USB3OTGx clocks are used as reference clocks for the two
DWC3 blocks.

Add simple support to get rate of CLK_REF_USB3OTGx clocks to fix
reference clock period configuration.

Signed-off-by: Jonas Karlman <[email protected]>
Reviewed-by: Kever Yang <[email protected]>

1 files changed, 4 insertions, 0 deletions

diff --git a/drivers/clk/rockchip/clk_rk3576.c b/drivers/clk/rockchip/clk_rk3576.c
index 1026af27ca1..dd8b59356ef 100644
--- a/drivers/clk/rockchip/clk_rk3576.c
+++ b/drivers/clk/rockchip/clk_rk3576.c
@@ -1987,6 +1987,8 @@ static ulong rk3576_clk_get_rate(struct clk *clk)
 	case HCLK_SDIO:
 		rate = rk3576_mmc_get_clk(priv, clk->id);
 		break;
+	case CLK_REF_USB3OTG0:
+	case CLK_REF_USB3OTG1:
 	case TCLK_EMMC:
 	case TCLK_WDT0:
 		rate = OSC_HZ;
@@ -2151,6 +2153,8 @@ static ulong rk3576_clk_set_rate(struct clk *clk, ulong rate)
 	case HCLK_SDIO:
 		ret = rk3576_mmc_set_clk(priv, clk->id, rate);
 		break;
+	case CLK_REF_USB3OTG0:
+	case CLK_REF_USB3OTG1:
 	case TCLK_EMMC:
 	case TCLK_WDT0:
 		ret = OSC_HZ;