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authorPranav Tilak <[email protected]>2026-01-29 13:40:54 +0530
committerMichal Simek <[email protected]>2026-02-11 09:41:26 +0100
commitce6fc049b700894b2a8f25778103cf4f2d29cb34 (patch)
tree8643a8e564deccc69ec4813b1108f2de0260ff70 /drivers
parent85bbd16750ed7a4907666bfa01effc39ef1f4c0c (diff)
net: phy: mscc: Enable RMII clock output for VSC8541 PHY
Set RMII reference clock output to enabled (1) by default for VSC8541 PHY in RMII mode. The RMII specification requires a 50MHz reference clock, and many board designs expect the PHY to provide this clock to the MAC controller. Previously, the driver defaulted rmii_clk_out to 0 (disabled) for all interface modes, which caused the PHY to not output the required 50MHz clock. This resulted in MAC-PHY communication failures and prevented network operations like DHCP from working on RMII-configured boards. This change alligns with the hardware power-up default behavior and aligns with both the generic PHY driver and Linux MSCC PHY driver implementations. Signed-off-by: Pranav Tilak <[email protected]> Signed-off-by: Michal Simek <[email protected]> Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'drivers')
-rw-r--r--drivers/net/phy/mscc.c2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/net/phy/mscc.c b/drivers/net/phy/mscc.c
index 7263887b9ce..a65e81dff0c 100644
--- a/drivers/net/phy/mscc.c
+++ b/drivers/net/phy/mscc.c
@@ -1388,7 +1388,7 @@ static int vsc8541_config(struct phy_device *phydev)
return -EINVAL;
}
/* Default RMII Clk Output to 0=OFF/1=ON */
- rmii_clk_out = 0;
+ rmii_clk_out = 1;
retval = vsc8531_vsc8541_clk_skew_config(phydev);
if (retval != 0)