Merge branch '2023-06-19-corstone1000-fwu-updates' into next

To quote the author:
Now that the nvmxip block driver is merged we can add on top
of it the platform code to use GPT and FWU metadata in the
Corstone1000.

But first, push 2 fixes that are needed to make all this work:
 - move nvmxip header to include
 - setup fwu metadata structures as packed (we have a 32bit
   writer - Secure enclave Cortex-M0 and a 64bit reader host
   Cortex-A35)

1 files changed, 0 insertions, 32 deletions

diff --git a/drivers/mtd/nvmxip/nvmxip.h b/drivers/mtd/nvmxip/nvmxip.h
deleted file mode 100644
index f4ef37725d2..00000000000
--- a/drivers/mtd/nvmxip/nvmxip.h
+++ /dev/null
@@ -1,32 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2023 Arm Limited and/or its affiliates <[email protected]>
- *
- * Authors:
- *   Abdellatif El Khlifi <[email protected]>
- */
-
-#ifndef __DRIVER_NVMXIP_H__
-#define __DRIVER_NVMXIP_H__
-
-#include <blk.h>
-
-#define NVMXIP_BLKDRV_NAME    "nvmxip-blk"
-#define NVMXIP_BLKDEV_NAME_SZ 20
-
-/**
- * struct nvmxip_plat - the NVMXIP driver plat
- *
- * @phys_base:	NVM XIP device base address
- * @lba_shift:	block size shift count
- * @lba:	number of blocks
- *
- * The NVMXIP information read from the DT.
- */
-struct nvmxip_plat {
-	phys_addr_t phys_base;
-	u32 lba_shift;
-	lbaint_t lba;
-};
-
-#endif /* __DRIVER_NVMXIP_H__ */