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authorTom Rini <[email protected]>2026-06-17 09:52:33 -0600
committerTom Rini <[email protected]>2026-06-17 09:52:33 -0600
commite79de74103d9d411aa6b4e63582c5d7075c6a7a8 (patch)
treebf9ca91d3b8d42b34a5188abec5cd32acdff675e /drivers
parenta0a1e9f2f1dffed04ee52723ce957c07bb905c25 (diff)
parent8974dd64e621d3a2c5d2d1fe038bacac35996758 (diff)
Merge patch series "arm: omap: Add back omap4 support"
Bastien Curutchet <[email protected]> says: This series aims to add back the omap4 support. This support was removed by commit b0ee3fe642c ("arm: ti: Remove omap4 platform support") because at that moment, none of the OMAP4-based boards had done the migration to DM_I2C. My use case is an old product based on the Variscite's omap4 system on module. I needed to upgrade U-Boot on it for security reasons. I think that this work could benefit to other people who may have same kind of product to maintain. Patch 1 to 3 remove the omap's clock driver dependency to the AM33xx as it is also present in omap4 platforms. I tested these changes on the beaglebone black to ensure I didn't break the AM33xx case. Patch 4 & 5 revert the deletion of the omap4 support. The revert makes checkpatch.pl angry. I fixed quite a lots of warnings already but it remains two kinds of warnings: - CamelCase on timings structure, I left the CamelCase because IMHO it's more readable this way. - #ifdef CONFIG_XYZ shouldn't be used anymore. I left one of this because I didn't find a clean way to get rid of it. Patch 6 adds support for the Variscite's system on module. This system on module is supported by the Linux project through ti/omap/omap4-var-som-om44.dtsi Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/ti/clk-ctrl.c48
-rw-r--r--drivers/i2c/Kconfig2
-rw-r--r--drivers/mmc/Kconfig2
3 files changed, 39 insertions, 13 deletions
diff --git a/drivers/clk/ti/clk-ctrl.c b/drivers/clk/ti/clk-ctrl.c
index c5c97dc35c4..08f7410edce 100644
--- a/drivers/clk/ti/clk-ctrl.c
+++ b/drivers/clk/ti/clk-ctrl.c
@@ -8,7 +8,11 @@
#include <dm.h>
#include <dm/device_compat.h>
#include <clk-uclass.h>
-#include <asm/arch-am33xx/clock.h>
+#include <asm/ti-common/omap_clock.h>
+#include <asm/io.h>
+#include <linux/iopoll.h>
+
+#define TRANSITION_TIMEOUT_US 10000
struct clk_ti_ctrl_offs {
fdt_addr_t start;
@@ -33,10 +37,37 @@ static int clk_ti_ctrl_check_offs(struct clk *clk, fdt_addr_t offs)
return -EFAULT;
}
+#define IDLEST_DISABLED (MODULE_CLKCTRL_IDLEST_DISABLED << MODULE_CLKCTRL_IDLEST_SHIFT)
+#define IDLEST_TRANSITION (MODULE_CLKCTRL_IDLEST_TRANSITIONING << MODULE_CLKCTRL_IDLEST_SHIFT)
+static int clk_ti_ctrl_disable_clock_module(u32 addr)
+{
+ int val;
+
+ clrsetbits_le32(addr, MODULE_CLKCTRL_MODULEMODE_MASK,
+ MODULE_CLKCTRL_MODULEMODE_SW_DISABLE <<
+ MODULE_CLKCTRL_MODULEMODE_SHIFT);
+
+ return readl_relaxed_poll_timeout(addr, val,
+ (val & MODULE_CLKCTRL_IDLEST_MASK) == IDLEST_DISABLED,
+ TRANSITION_TIMEOUT_US);
+}
+
+static int clk_ti_ctrl_enable_clock_module(u32 addr)
+{
+ int val;
+
+ clrsetbits_le32(addr, MODULE_CLKCTRL_MODULEMODE_MASK,
+ MODULE_CLKCTRL_MODULEMODE_SW_EXPLICIT_EN <<
+ MODULE_CLKCTRL_MODULEMODE_SHIFT);
+ return readl_relaxed_poll_timeout(addr, val,
+ ((val & MODULE_CLKCTRL_IDLEST_MASK) != IDLEST_DISABLED) &&
+ ((val & MODULE_CLKCTRL_IDLEST_MASK) != IDLEST_TRANSITION),
+ TRANSITION_TIMEOUT_US);
+}
+
static int clk_ti_ctrl_disable(struct clk *clk)
{
struct clk_ti_ctrl_priv *priv = dev_get_priv(clk->dev);
- u32 *clk_modules[2] = { };
fdt_addr_t offs;
int err;
@@ -47,16 +78,13 @@ static int clk_ti_ctrl_disable(struct clk *clk)
return err;
}
- clk_modules[0] = (u32 *)(offs);
- dev_dbg(clk->dev, "disable module @ %p\n", clk_modules[0]);
- do_disable_clocks(NULL, clk_modules, 1);
- return 0;
+ dev_dbg(clk->dev, "disable module @ %x\n", offs);
+ return clk_ti_ctrl_disable_clock_module(offs);
}
static int clk_ti_ctrl_enable(struct clk *clk)
{
struct clk_ti_ctrl_priv *priv = dev_get_priv(clk->dev);
- u32 *clk_modules[2] = { };
fdt_addr_t offs;
int err;
@@ -67,10 +95,8 @@ static int clk_ti_ctrl_enable(struct clk *clk)
return err;
}
- clk_modules[0] = (u32 *)(offs);
- dev_dbg(clk->dev, "enable module @ %p\n", clk_modules[0]);
- do_enable_clocks(NULL, clk_modules, 1);
- return 0;
+ dev_dbg(clk->dev, "enable module @ %x\n", offs);
+ return clk_ti_ctrl_enable_clock_module(offs);
}
static ulong clk_ti_ctrl_get_rate(struct clk *clk)
diff --git a/drivers/i2c/Kconfig b/drivers/i2c/Kconfig
index 37288a47eb7..8c2f71b9fe2 100644
--- a/drivers/i2c/Kconfig
+++ b/drivers/i2c/Kconfig
@@ -780,7 +780,7 @@ config SYS_I2C_BUS_MAX
int "Max I2C busses"
depends on ARCH_OMAP2PLUS || ARCH_SOCFPGA
default 3 if OMAP34XX || AM33XX || AM43XX
- default 4 if ARCH_SOCFPGA
+ default 4 if ARCH_SOCFPGA || OMAP44XX
default 5 if OMAP54XX
help
Define the maximum number of available I2C buses.
diff --git a/drivers/mmc/Kconfig b/drivers/mmc/Kconfig
index 24bd16ad5f3..0996d9fc30d 100644
--- a/drivers/mmc/Kconfig
+++ b/drivers/mmc/Kconfig
@@ -415,7 +415,7 @@ config MMC_OMAP36XX_PINS
config HSMMC2_8BIT
bool "Enable 8-bit interface for eMMC (interface #2)"
- depends on MMC_OMAP_HS && (OMAP54XX || DRA7XX || AM33XX || \
+ depends on MMC_OMAP_HS && (OMAP44XX || OMAP54XX || DRA7XX || AM33XX || \
AM43XX || ARCH_KEYSTONE)
config SH_MMCIF