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authorTom Rini <[email protected]>2024-12-15 08:02:22 -0600
committerTom Rini <[email protected]>2024-12-15 08:02:22 -0600
commiteb1817ad8707e31da23e4b30e6cbe09056e0dca3 (patch)
tree17161fb42f1a072096a6428b6c4246ca06efb5cc /drivers
parent88bd5701efdc48048e030d91c2633048f0f753a0 (diff)
parent55e8704402350d06e8ebf244515d96c36a3bacf5 (diff)
Merge tag 'doc-2025-01-rc5' of https://source.denx.de/u-boot/custodians/u-boot-efi
Pull request doc-2025-01-rc5 Documentation: * sending_patches: Fix spelling of "its" * environment: NET_LWIP dhcp sets ipaddrN, netmaskN and gatewayipN * remove redundant Rockchip bindings * fwu_updates: Fix formatting * coolpi: Fix document style * board: theobroma-systems: fix feature list in introductions Fix typos in code comments: * clk: mpc83xx: Fix typo in "Coherent System Bus" * efi_loader: Fix typos in enum efi_allocate_type
Diffstat (limited to 'drivers')
-rw-r--r--drivers/clk/mpc83xx_clk.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/drivers/clk/mpc83xx_clk.h b/drivers/clk/mpc83xx_clk.h
index c06a51ecd43..6b74fc5f16b 100644
--- a/drivers/clk/mpc83xx_clk.h
+++ b/drivers/clk/mpc83xx_clk.h
@@ -321,7 +321,7 @@ static inline u32 get_pci_sync_in(immap_t *im)
}
/**
- * get_csb_clk() - Read the CSB (Coheren System Bus) clock speed
+ * get_csb_clk() - Read the CSB (Coherent System Bus) clock speed
* @im: Pointer to the MPC83xx main register map in question
*
* Return: The CSB clock speed value as a 32-bit number.