diff options
| author | Tom Rini <[email protected]> | 2026-04-20 09:31:12 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2026-04-20 11:43:11 -0600 |
| commit | 5d401bfbdf1da9eb34575b0b15e18757f2b38ca0 (patch) | |
| tree | ef0be8a0a30c5d6b987f193bd6cd551428024725 /dts/upstream/src/arm/intel | |
| parent | e3405917a1806971d9e72a94186b299f05581e1a (diff) | |
| parent | b427decccfe983eda4f815ddcf5dcbe733cd04f6 (diff) | |
Subtree merge tag 'v7.0-dts' of dts repo [1] into dts/upstream
[1] https://git.kernel.org/pub/scm/linux/kernel/git/devicetree/devicetree-rebasing.git
- Remove netc_timerX nodes from arch/arm/dts/imx943-u-boot.dtsi as they
are now upstream
- Move dts/upstream/include/dt-bindings/reset/bcm6318-reset.h to
include/dt-bindings/reset/bcm6318-reset.h as upstream has removed this
file as unused (but we use it).
Signed-off-by: Tom Rini <[email protected]>
Diffstat (limited to 'dts/upstream/src/arm/intel')
| -rw-r--r-- | dts/upstream/src/arm/intel/socfpga/socfpga.dtsi | 6 | ||||
| -rw-r--r-- | dts/upstream/src/arm/intel/socfpga/socfpga_arria10.dtsi | 6 |
2 files changed, 10 insertions, 2 deletions
diff --git a/dts/upstream/src/arm/intel/socfpga/socfpga.dtsi b/dts/upstream/src/arm/intel/socfpga/socfpga.dtsi index 35be14150f4..5dc8d33e8ad 100644 --- a/dts/upstream/src/arm/intel/socfpga/socfpga.dtsi +++ b/dts/upstream/src/arm/intel/socfpga/socfpga.dtsi @@ -87,12 +87,13 @@ }; }; - base_fpga_region { + base_fpga_region: fpga-region { compatible = "fpga-region"; fpga-mgr = <&fpgamgr0>; #address-cells = <0x1>; #size-cells = <0x1>; + ranges; }; can0: can@ffc00000 { @@ -785,6 +786,9 @@ ocram: sram@ffff0000 { compatible = "mmio-sram"; reg = <0xffff0000 0x10000>; + #address-cells = <0x1>; + #size-cells = <0x1>; + ranges; }; qspi: spi@ff705000 { diff --git a/dts/upstream/src/arm/intel/socfpga/socfpga_arria10.dtsi b/dts/upstream/src/arm/intel/socfpga/socfpga_arria10.dtsi index b108265e9bd..a53a94678df 100644 --- a/dts/upstream/src/arm/intel/socfpga/socfpga_arria10.dtsi +++ b/dts/upstream/src/arm/intel/socfpga/socfpga_arria10.dtsi @@ -80,12 +80,13 @@ }; }; - base_fpga_region { + base_fpga_region: fpga-region { #address-cells = <0x1>; #size-cells = <0x1>; compatible = "fpga-region"; fpga-mgr = <&fpga_mgr>; + ranges; }; clkmgr@ffd04000 { @@ -686,6 +687,9 @@ ocram: sram@ffe00000 { compatible = "mmio-sram"; reg = <0xffe00000 0x40000>; + #address-cells = <1>; + #size-cells = <1>; + ranges; }; eccmgr: eccmgr { |