diff options
| author | Andre Przywara <[email protected]> | 2025-05-05 21:24:16 +0100 |
|---|---|---|
| committer | Andre Przywara <[email protected]> | 2025-06-24 01:59:09 +0100 |
| commit | 2b2783a1c072b87559e8548c50dd487c605349ae (patch) | |
| tree | 3900d63535aff852fb3ac27a3bee6b52d41fc8a9 /dts | |
| parent | fb4c3b2a049514ec5a8ef1b71567c43849c7fd78 (diff) | |
arm64: dts: allwinner: a100: set maximum MMC frequency
The manual for the Allwinner A133 SoC mentions that the maximum
supported MMC frequency is 150 MHz, for all of the MMC devices.
Describe that in the DT entry, to help drivers setting the right
interface frequency.
Fixes: fcfbb8d9ec58 ("arm64: allwinner: a100: Add MMC related nodes")
Signed-off-by: Andre Przywara <[email protected]>
Link: https://patch.msgid.link/[email protected]
Signed-off-by: Chen-Yu Tsai <[email protected]>
[ upstream commit: d8f10550448b03d3c5c6d9392119205c65ebfc89 ]
(cherry picked from commit 85e37e6a8a002eb231df8209478d7ff2b134a451)
Diffstat (limited to 'dts')
| -rw-r--r-- | dts/upstream/src/arm64/allwinner/sun50i-a100.dtsi | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/dts/upstream/src/arm64/allwinner/sun50i-a100.dtsi b/dts/upstream/src/arm64/allwinner/sun50i-a100.dtsi index f9f6fea03b7..bd366389b23 100644 --- a/dts/upstream/src/arm64/allwinner/sun50i-a100.dtsi +++ b/dts/upstream/src/arm64/allwinner/sun50i-a100.dtsi @@ -252,6 +252,7 @@ interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mmc0_pins>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -267,6 +268,7 @@ interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mmc1_pins>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; @@ -282,6 +284,7 @@ interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>; pinctrl-names = "default"; pinctrl-0 = <&mmc2_pins>; + max-frequency = <150000000>; status = "disabled"; #address-cells = <1>; #size-cells = <0>; |