Merge branch 'next'

17 files changed, 155 insertions, 107 deletions

diff --git a/include/configs/bananapi-f3.h b/include/configs/bananapi-f3.h
new file mode 100644
index 00000000000..97cf4d72df0
--- /dev/null
+++ b/include/configs/bananapi-f3.h
@@ -0,0 +1,13 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later */
+/*
+ * Copyright (c) 2024, Kongyang Liu <[email protected]>
+ *
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CFG_SYS_SDRAM_BASE         0x0
+#define CFG_SYS_NS16550_IER        0x40 /* UART Unit Enable */
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h
index 1f61b2b6af6..4d95f3fd79b 100644
--- a/include/configs/capricorn-common.h
+++ b/include/configs/capricorn-common.h
@@ -95,7 +95,9 @@
 #define CFG_SYS_SDRAM_BASE		0x80000000
 #define PHYS_SDRAM_1			0x80000000
 #define PHYS_SDRAM_2			0x880000000
-/* DDR3 board total DDR is 1 GB */
+/* Set default values to the smallest DDR we have in capricorn modules
+ * Use it in case the system controller would return an error
+ */
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1 GB */
 #define PHYS_SDRAM_2_SIZE		0x00000000	/* 0 GB */
 
diff --git a/include/configs/deneb.h b/include/configs/deneb.h
deleted file mode 100644
index f155bb8bf50..00000000000
--- a/include/configs/deneb.h
+++ /dev/null
@@ -1,16 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright 2019 Siemens AG
- *
- */
-
-#ifndef __DENEB_H
-#define __DENEB_H
-
-#include "capricorn-common.h"
-
-/* DDR3 board total DDR is 2 GB */
-#undef PHYS_SDRAM_1_SIZE
-#define PHYS_SDRAM_1_SIZE		0x80000000	/* 2 GB */
-
-#endif /* __DENEB_H */
diff --git a/include/configs/imx91_evk.h b/include/configs/imx91_evk.h
new file mode 100644
index 00000000000..9c5014fd0a5
--- /dev/null
+++ b/include/configs/imx91_evk.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2024 NXP
+ */
+
+#ifndef __IMX91_EVK_H
+#define __IMX91_EVK_H
+
+#define CFG_SYS_UBOOT_BASE	\
+	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+
+#define CFG_SYS_INIT_RAM_ADDR	0x80000000
+#define CFG_SYS_INIT_RAM_SIZE	0x200000
+
+#define CFG_SYS_SDRAM_BASE	0x80000000
+#define PHYS_SDRAM		0x80000000
+#define PHYS_SDRAM_SIZE		0x80000000 /* 2GB DDR */
+
+#define WDOG_BASE_ADDR		WDG3_BASE_ADDR
+
+#endif
diff --git a/include/configs/j721e_evm.h b/include/configs/j721e_evm.h
index bdf12ee8f7e..85120629529 100644
--- a/include/configs/j721e_evm.h
+++ b/include/configs/j721e_evm.h
@@ -15,11 +15,14 @@
 #define CFG_SYS_FLASH_BASE		0x000000000
 
 /* SPL Loader Configuration */
-#if defined(CONFIG_TARGET_J721E_A72_EVM) || defined(CONFIG_TARGET_J7200_A72_EVM)
+#if defined(CONFIG_TARGET_J721E_A72_EVM)
 #define CFG_SYS_UBOOT_BASE		0x50280000
-/* Image load address in RAM for DFU boot*/
-#else
+#elif defined(CONFIG_TARGET_J7200_A72_EVM)
+#define CFG_SYS_UBOOT_BASE		0x50300000
+#elif defined(CONFIG_TARGET_J721E_R5_EVM)
 #define CFG_SYS_UBOOT_BASE		0x50080000
+#else
+#define CFG_SYS_UBOOT_BASE		0x50100000
 #endif
 
 /**
diff --git a/include/configs/khadas-vim3_android.h b/include/configs/khadas-vim3_android.h
index fc89efb4c36..551ab51c881 100644
--- a/include/configs/khadas-vim3_android.h
+++ b/include/configs/khadas-vim3_android.h
@@ -24,7 +24,7 @@
 	"name=boot_a,size=64M,bootable,uuid=${uuid_gpt_boot_a};" \
 	"name=boot_b,size=64M,bootable,uuid=${uuid_gpt_boot_b};" \
 	"name=super,size=3072M,uuid=${uuid_gpt_super};" \
-	"name=userdata,size=11282M,uuid=${uuid_gpt_userdata};" \
+	"name=userdata,size=11218M,uuid=${uuid_gpt_userdata};" \
 	"name=rootfs,size=-,uuid=" ROOT_UUID
 #else
 #define PARTS_DEFAULT \
@@ -37,14 +37,31 @@
 	"name=recovery,size=64M,uuid=${uuid_gpt_recovery};" \
 	"name=cache,size=256M,uuid=${uuid_gpt_cache};" \
 	"name=super,size=1792M,uuid=${uuid_gpt_super};" \
-	"name=userdata,size=12786M,uuid=${uuid_gpt_userdata};" \
+	"name=userdata,size=12722M,uuid=${uuid_gpt_userdata};" \
 	"name=rootfs,size=-,uuid=" ROOT_UUID
 #endif
 
-#define EXTRA_ANDROID_ENV_SETTINGS \
-	"board=vim3\0" \
-	"board_name=vim3\0" \
+#define CFG_EXTRA_ENV_SETTINGS                                    \
+	"board=vim3\0"                                               \
+	"board_name=vim3\0"                                          \
+	"bootmeths=android\0"                                         \
+	"bootcmd=bootflow scan\0"                                     \
+	"adtb_idx=3\0"                                                \
+	"partitions=" PARTS_DEFAULT "\0"                              \
+	"mmcdev=2\0"                                                  \
+	"fastboot_raw_partition_bootloader=0x1 0xfff mmcpart 1\0"     \
+	"fastboot_raw_partition_bootenv=0x0 0xfff mmcpart 2\0"        \
+	"stdin=" STDIN_CFG "\0"                                       \
+	"stdout=" STDOUT_CFG "\0"                                     \
+	"stderr=" STDOUT_CFG "\0"                                     \
+	"dtboaddr=0x08200000\0"                                       \
+	"loadaddr=0x01080000\0"                                       \
+	"fdt_addr_r=0x01000000\0"                                     \
+	"scriptaddr=0x08000000\0"                                     \
+	"kernel_addr_r=0x01080000\0"                                  \
+	"pxefile_addr_r=0x01080000\0"                                 \
+	"ramdisk_addr_r=0x13000000\0"                                 \
 
-#include <configs/meson64_android.h>
+#include <configs/meson64.h>
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/khadas-vim3l_android.h b/include/configs/khadas-vim3l_android.h
index 5b2aed1cf62..1869249e7c9 100644
--- a/include/configs/khadas-vim3l_android.h
+++ b/include/configs/khadas-vim3l_android.h
@@ -24,7 +24,7 @@
 	"name=boot_a,size=64M,bootable,uuid=${uuid_gpt_boot_a};" \
 	"name=boot_b,size=64M,bootable,uuid=${uuid_gpt_boot_b};" \
 	"name=super,size=3072M,uuid=${uuid_gpt_super};" \
-	"name=userdata,size=11282M,uuid=${uuid_gpt_userdata};" \
+	"name=userdata,size=11218M,uuid=${uuid_gpt_userdata};" \
 	"name=rootfs,size=-,uuid=" ROOT_UUID
 #else
 #define PARTS_DEFAULT \
@@ -37,14 +37,31 @@
 	"name=recovery,size=64M,uuid=${uuid_gpt_recovery};" \
 	"name=cache,size=256M,uuid=${uuid_gpt_cache};" \
 	"name=super,size=1792M,uuid=${uuid_gpt_super};" \
-	"name=userdata,size=12786M,uuid=${uuid_gpt_userdata};" \
+	"name=userdata,size=12722M,uuid=${uuid_gpt_userdata};" \
 	"name=rootfs,size=-,uuid=" ROOT_UUID
 #endif
 
-#define EXTRA_ANDROID_ENV_SETTINGS \
-	"board=vim3l\0" \
-	"board_name=vim3l\0" \
+#define CFG_EXTRA_ENV_SETTINGS                                    \
+	"board=vim3l\0"                                               \
+	"board_name=vim3l\0"                                          \
+	"bootmeths=android\0"                                         \
+	"bootcmd=bootflow scan\0"                                     \
+	"adtb_idx=2\0"                                                \
+	"partitions=" PARTS_DEFAULT "\0"                              \
+	"mmcdev=2\0"                                                  \
+	"fastboot_raw_partition_bootloader=0x1 0xfff mmcpart 1\0"     \
+	"fastboot_raw_partition_bootenv=0x0 0xfff mmcpart 2\0"        \
+	"stdin=" STDIN_CFG "\0"                                       \
+	"stdout=" STDOUT_CFG "\0"                                     \
+	"stderr=" STDOUT_CFG "\0"                                     \
+	"dtboaddr=0x08200000\0"                                       \
+	"loadaddr=0x01080000\0"                                       \
+	"fdt_addr_r=0x01000000\0"                                     \
+	"scriptaddr=0x08000000\0"                                     \
+	"kernel_addr_r=0x01080000\0"                                  \
+	"pxefile_addr_r=0x01080000\0"                                 \
+	"ramdisk_addr_r=0x13000000\0"                                 \
 
-#include <configs/meson64_android.h>
+#include <configs/meson64.h>
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/licheerv_nano.h b/include/configs/licheerv_nano.h
new file mode 100644
index 00000000000..2ea7943f66f
--- /dev/null
+++ b/include/configs/licheerv_nano.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2024, Thomas Bonnefille <[email protected]>
+ *
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#include <config_distro_bootcmd.h>
+
+#define BOOT_TARGET_DEVICES(func) \
+	func(MMC, mmc, 0)
+
+#define CFG_SYS_SDRAM_BASE         0x80000000
+
+#define CFG_EXTRA_ENV_SETTINGS  "consoledev=ttyS0\0" \
+								"baudrate=115200\0" \
+								"fdt_addr_r=0x82000000\0" \
+								"kernel_addr_r=0x81000000\0" \
+								"scriptaddr=0x80c00000\0" \
+								BOOTENV
+
+#endif /* __CONFIG_H */
diff --git a/include/configs/meson64_android.h b/include/configs/meson64_android.h
index 77364bbf9cf..d6ef0a83a68 100644
--- a/include/configs/meson64_android.h
+++ b/include/configs/meson64_android.h
@@ -104,12 +104,6 @@
 	"elif test $board_name = sei610; then " \
 		"echo \"  Reading DTB for sei610...\"; " \
 		"setenv dtb_index 1;" \
-	"elif test $board_name = vim3l; then " \
-		"echo \"  Reading DTB for vim3l...\"; " \
-		"setenv dtb_index 2;" \
-	"elif test $board_name = vim3; then " \
-		"echo \"  Reading DTB for vim3...\"; " \
-		"setenv dtb_index 3;" \
 	"else " \
 		"echo Error: Android boot is not supported for $board_name; " \
 		"exit; " \
diff --git a/include/configs/phycore_am62ax.h b/include/configs/phycore_am62ax.h
new file mode 100644
index 00000000000..661ba8f73ca
--- /dev/null
+++ b/include/configs/phycore_am62ax.h
@@ -0,0 +1,15 @@
+/* SPDX-License-Identifier: GPL-2.0-or-later OR MIT */
+/*
+ * Configuration header file for PHYTEC phyCORE-AM62Ax
+ *
+ * Copyright (C) 2024 PHYTEC America LLC
+ * Author: Garrett Giordano <[email protected]>
+ */
+
+#ifndef __PHYCORE_AM62AX_H
+#define __PHYCORE_AM62AX_H
+
+/* DDR Configuration */
+#define CFG_SYS_SDRAM_BASE		0x80000000
+
+#endif /* __PHYCORE_AM62AX_H */
diff --git a/include/configs/phycore_am62x.h b/include/configs/phycore_am62x.h
index 10b78b6f537..2bc6e7e16f9 100644
--- a/include/configs/phycore_am62x.h
+++ b/include/configs/phycore_am62x.h
@@ -12,4 +12,8 @@
 /* DDR Configuration */
 #define CFG_SYS_SDRAM_BASE		0x80000000
 
+#define PHYCORE_AM6XX_FW_NAME_TIBOOT3	u"PHYCORE_AM62X_TIBOOT3"
+#define PHYCORE_AM6XX_FW_NAME_SPL	u"PHYCORE_AM62X_SPL"
+#define PHYCORE_AM6XX_FW_NAME_UBOOT	u"PHYCORE_AM62X_UBOOT"
+
 #endif /* __PHYCORE_AM62X_H */
diff --git a/include/configs/phycore_am64x.h b/include/configs/phycore_am64x.h
index 9377db30a91..dd3dfa94270 100644
--- a/include/configs/phycore_am64x.h
+++ b/include/configs/phycore_am64x.h
@@ -12,4 +12,8 @@
 /* DDR Configuration */
 #define CFG_SYS_SDRAM_BASE		0x80000000
 
+#define PHYCORE_AM6XX_FW_NAME_TIBOOT3	u"PHYCORE_AM64X_TIBOOT3"
+#define PHYCORE_AM6XX_FW_NAME_SPL	u"PHYCORE_AM64X_SPL"
+#define PHYCORE_AM6XX_FW_NAME_UBOOT	u"PHYCORE_AM64X_UBOOT"
+
 #endif /* __PHYCORE_AM64X_H */
diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h
index e74a3f184c6..20e2ab832ee 100644
--- a/include/configs/phycore_imx8mm.h
+++ b/include/configs/phycore_imx8mm.h
@@ -20,52 +20,6 @@
 /* For RAW image gives a error info not panic */
 #endif
 
-#define CFG_EXTRA_ENV_SETTINGS \
-	"image=Image\0" \
-	"console=ttymxc2,115200\0" \
-	"fdt_addr=0x48000000\0" \
-	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
-	"ip_dyn=yes\0" \
-	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
-	"mmcpart=1\0" \
-	"mmcroot=2\0" \
-	"update_offset=0x42\0" \
-	"update_filename=flash.bin\0" \
-	"update_bootimg="						\
-		"mmc dev ${mmcdev} ; "		\
-		"if dhcp ${loadaddr} ${update_filepath}/${update_filename} ; then "	\
-		"setexpr fw_sz ${filesize} / 0x200 ; "	/* SD block size */ \
-		"mmc write ${loadaddr} ${update_offset} ${fw_sz} ; "	\
-		"fi\0" \
-	"mmcautodetect=yes\0" \
-	"mmcargs=setenv bootargs console=${console} " \
-		"root=/dev/mmcblk${mmcdev}p${mmcroot} rootwait rw\0" \
-	"loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\0" \
-	"loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr} ${fdt_file}\0" \
-	"mmcboot=echo Booting from mmc ...; " \
-		"run mmcargs; " \
-		"if run loadfdt; then " \
-			"booti ${loadaddr} - ${fdt_addr}; " \
-		"else " \
-			"echo WARN: Cannot load the DT; " \
-		"fi;\0 " \
-	"nfsroot=/nfs\0" \
-	"netargs=setenv bootargs console=${console} root=/dev/nfs ip=dhcp " \
-		"nfsroot=${serverip}:${nfsroot},v3,tcp\0" \
-	"netboot=echo Booting from net ...; " \
-		"run netargs; " \
-		"if test ${ip_dyn} = yes; then " \
-			"setenv get_cmd dhcp; " \
-		"else " \
-			"setenv get_cmd tftp; " \
-		"fi; " \
-		"${get_cmd} ${loadaddr} ${image}; " \
-		"if ${get_cmd} ${fdt_addr} ${fdt_file}; then " \
-			"booti ${loadaddr} - ${fdt_addr}; " \
-		"else " \
-			"echo WARN: Cannot load the DT; " \
-		"fi;\0" \
-
 /* Link Definitions */
 
 #define CFG_SYS_INIT_RAM_ADDR	0x40000000
diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h
index 0ae4fc55a97..8de930eab54 100644
--- a/include/configs/pic32mzdask.h
+++ b/include/configs/pic32mzdask.h
@@ -19,8 +19,11 @@
  */
 /* Initial RAM for temporary stack, global data */
 #define CFG_SYS_INIT_RAM_SIZE	0x10000
+#define CFG_SYS_SRAM_BASE	0x80000000
+#define CFG_SYS_SRAM_SIZE	0x00080000
+
 #define CFG_SYS_INIT_RAM_ADDR	\
-	(CONFIG_SYS_SRAM_BASE + CONFIG_SYS_SRAM_SIZE - CFG_SYS_INIT_RAM_SIZE)
+	(CFG_SYS_SRAM_BASE + CFG_SYS_SRAM_SIZE - CFG_SYS_INIT_RAM_SIZE)
 
 /* SDRAM Configuration (for final code, data, stack, heap) */
 #define CFG_SYS_SDRAM_BASE		0x88000000
diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h
index 67c9faeca57..020e79ca2a8 100644
--- a/include/configs/rcar-gen2-common.h
+++ b/include/configs/rcar-gen2-common.h
@@ -1,8 +1,9 @@
 /* SPDX-License-Identifier: GPL-2.0 */
 /*
  * include/configs/rcar-gen2-common.h
+ *	This file is R-Car Gen2 common configuration file.
  *
- * Copyright (C) 2013,2014 Renesas Electronics Corporation
+ * Copyright (C) 2013-2024 Renesas Electronics Corporation
  */
 
 #ifndef __RCAR_GEN2_COMMON_H
@@ -10,14 +11,15 @@
 
 #include <asm/arch/renesas.h>
 
-/* console */
-#define CFG_SYS_BAUDRATE_TABLE	{ 38400, 115200 }
+/* Console */
+#define CFG_SYS_BAUDRATE_TABLE		{ 38400, 115200 }
 
+/* Memory */
 #define CFG_SYS_SDRAM_BASE		(RCAR_GEN2_SDRAM_BASE)
 #define CFG_SYS_SDRAM_SIZE		(RCAR_GEN2_UBOOT_SDRAM_SIZE)
 
 /* Timer */
-#define CFG_SYS_TIMER_COUNTER	(TMU_BASE + 0xc)	/* TCNT0 */
+#define CFG_SYS_TIMER_COUNTER		(TMU_BASE + 0xc)	/* TCNT0 */
 #define CFG_SYS_TIMER_RATE		(get_board_sys_clk() / 8)
 
 #endif	/* __RCAR_GEN2_COMMON_H */
diff --git a/include/configs/rcar-gen3-common.h b/include/configs/rcar-gen3-common.h
index 3f0831a901c..bedb1c0843e 100644
--- a/include/configs/rcar-gen3-common.h
+++ b/include/configs/rcar-gen3-common.h
@@ -3,7 +3,7 @@
  * include/configs/rcar-gen3-common.h
  *	This file is R-Car Gen3 common configuration file.
  *
- * Copyright (C) 2015-2017 Renesas Electronics Corporation
+ * Copyright (C) 2015-2024 Renesas Electronics Corporation
  */
 
 #ifndef __RCAR_GEN3_COMMON_H
@@ -11,24 +11,17 @@
 
 #include <asm/arch/renesas.h>
 
-/* boot option */
+/* Console */
+#define CFG_SYS_BAUDRATE_TABLE		{ 115200, 38400 }
 
-/* Generic Interrupt Controller Definitions */
-#define GICD_BASE	0xF1010000
-#define GICC_BASE	0xF1020000
-
-/* console */
-#define CFG_SYS_BAUDRATE_TABLE	{ 115200, 38400 }
-
-/* MEMORY */
+/* Memory */
 #define DRAM_RSV_SIZE			0x08000000
 #define CFG_SYS_SDRAM_BASE		(0x40000000 + DRAM_RSV_SIZE)
 #define CFG_SYS_SDRAM_SIZE		(0x80000000u - DRAM_RSV_SIZE)
 #define CFG_MAX_MEM_MAPPED		(0x80000000u - DRAM_RSV_SIZE)
 
-/* ENV setting */
-
-#define CFG_EXTRA_ENV_SETTINGS	\
+/* Environment setting */
+#define CFG_EXTRA_ENV_SETTINGS		\
 	"bootm_size=0x10000000\0"
 
 #endif	/* __RCAR_GEN3_COMMON_H */
diff --git a/include/configs/rcar-gen4-common.h b/include/configs/rcar-gen4-common.h
index 37a37c013df..1a00adb79d1 100644
--- a/include/configs/rcar-gen4-common.h
+++ b/include/configs/rcar-gen4-common.h
@@ -3,7 +3,7 @@
  * include/configs/rcar-gen4-common.h
  *	This file is R-Car Gen4 common configuration file.
  *
- * Copyright (C) 2021 Renesas Electronics Corporation
+ * Copyright (C) 2021-2024 Renesas Electronics Corporation
  */
 
 #ifndef __RCAR_GEN4_COMMON_H
@@ -12,7 +12,7 @@
 #include <asm/arch/renesas.h>
 
 /* Console */
-#define CFG_SYS_BAUDRATE_TABLE	{ 38400, 115200, 921600, 1843200 }
+#define CFG_SYS_BAUDRATE_TABLE		{ 38400, 115200, 921600, 1843200 }
 
 /* Memory */
 #define DRAM_RSV_SIZE			0x08000000
@@ -20,10 +20,8 @@
 #define CFG_SYS_SDRAM_SIZE		(0x80000000u - DRAM_RSV_SIZE)
 #define CFG_MAX_MEM_MAPPED		(0x80000000u - DRAM_RSV_SIZE)
 
-/* PHY needs a longer autoneg timeout */
-
 /* Environment setting */
-#define CFG_EXTRA_ENV_SETTINGS					\
+#define CFG_EXTRA_ENV_SETTINGS		\
 	"bootm_size=0x10000000\0"
 
 #endif	/* __RCAR_GEN4_COMMON_H */