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authorTom Rini <[email protected]>2025-12-08 13:17:27 -0600
committerTom Rini <[email protected]>2025-12-08 13:17:27 -0600
commit59202e5ae76ef3acb34c4236e43248f1cd3fc642 (patch)
tree30004ced6a059b2c25afb0aca8b049908c2212c3 /include/configs
parent8e12d6ccb3cfa84dd275a1b852b2a235de0162b0 (diff)
parent0e0a198a68be71148f5ec27ef86796174f91436f (diff)
Merge tag 'v2026.01-rc4' into next
Prepare v2026.01-rc4
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/exynos-mobile.h14
-rw-r--r--include/configs/ironhide.h11
-rw-r--r--include/configs/rcar-gen5-common.h24
-rw-r--r--include/configs/s5p4418_nanopi2.h1
-rw-r--r--include/configs/socfpga_vining_fpga.h1
5 files changed, 49 insertions, 2 deletions
diff --git a/include/configs/exynos-mobile.h b/include/configs/exynos-mobile.h
new file mode 100644
index 00000000000..862db5779ef
--- /dev/null
+++ b/include/configs/exynos-mobile.h
@@ -0,0 +1,14 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Samsung Exynos Generic Board Configuration (for mobile devices)
+ *
+ * Copyright (C) 2025 Kaustabh Chakraborty <[email protected]>
+ */
+
+#ifndef __CONFIG_EXYNOS_MOBILE_H
+#define __CONFIG_EXYNOS_MOBILE_H
+
+#define CPU_RELEASE_ADDR secondary_boot_addr
+#define CFG_SYS_BAUDRATE_TABLE {9600, 115200}
+
+#endif /* __CONFIG_EXYNOS_MOBILE_H */
diff --git a/include/configs/ironhide.h b/include/configs/ironhide.h
new file mode 100644
index 00000000000..703c1714052
--- /dev/null
+++ b/include/configs/ironhide.h
@@ -0,0 +1,11 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2025 Renesas Electronics Corp.
+ */
+
+#ifndef __IRONHIDE_H
+#define __IRONHIDE_H
+
+#include "rcar-gen5-common.h"
+
+#endif /* __IRONHIDE_H */
diff --git a/include/configs/rcar-gen5-common.h b/include/configs/rcar-gen5-common.h
new file mode 100644
index 00000000000..dc28d07c7f9
--- /dev/null
+++ b/include/configs/rcar-gen5-common.h
@@ -0,0 +1,24 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
+/*
+ * Copyright (C) 2025 Renesas Electronics Corporation
+ */
+
+#ifndef __RCAR_GEN5_COMMON_H
+#define __RCAR_GEN5_COMMON_H
+
+#include <asm/arch/renesas.h>
+
+/* Console */
+#define CFG_SYS_BAUDRATE_TABLE { 38400, 115200, 921600, 1843200, 3250000 }
+
+/* Memory */
+#define DRAM_RSV_SIZE 0x08000000
+#define CFG_SYS_SDRAM_BASE (0x40000000 + DRAM_RSV_SIZE)
+#define CFG_SYS_SDRAM_SIZE (0x80000000u - DRAM_RSV_SIZE)
+#define CFG_MAX_MEM_MAPPED (0x80000000u - DRAM_RSV_SIZE)
+
+/* Environment setting */
+#define CFG_EXTRA_ENV_SETTINGS \
+ "bootm_size=0x10000000\0"
+
+#endif /* __RCAR_GEN5_COMMON_H */
diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h
index fec1bfd50eb..8a8d54daf7b 100644
--- a/include/configs/s5p4418_nanopi2.h
+++ b/include/configs/s5p4418_nanopi2.h
@@ -139,7 +139,6 @@
#endif
#define CFG_EXTRA_ENV_SETTINGS \
- "fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"rootdev=" __stringify(CONFIG_ROOT_DEV) "\0" \
"rootpart=" __stringify(CONFIG_ROOT_PART) "\0" \
diff --git a/include/configs/socfpga_vining_fpga.h b/include/configs/socfpga_vining_fpga.h
index 4bb15cf4629..ad13f1345b0 100644
--- a/include/configs/socfpga_vining_fpga.h
+++ b/include/configs/socfpga_vining_fpga.h
@@ -40,7 +40,6 @@
"hostname=vining_fpga\0" \
"kernel_addr_r=0x10000000\0" \
"fdt_addr_r=0x20000000\0" \
- "fdt_high=0xffffffff\0" \
"initrd_high=0xffffffff\0" \
"dfu_alt_info=qspi0 sf 0:0;qspi1 sf 0:1\0" \
"mtdparts_0_16m=ff705000.spi.0:" /* 16MiB+128MiB SF config */ \