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authorTom Rini <[email protected]>2024-09-12 09:03:40 -0600
committerTom Rini <[email protected]>2024-09-12 09:03:40 -0600
commit9eb0d731d800b4fbc8e9ed0178fec0d6f201d911 (patch)
treee569bf502dc6a4dcef4fe06b9a13209bc8d33366 /include/configs
parent2857b983f8d0dfcf2d1659d1fd4b1ea24f37c4ec (diff)
parent2db018d2ca5ebd7acc717f0b1959ee67fcd2b0a1 (diff)
Merge branch 'next' of https://source.denx.de/u-boot/custodians/u-boot-riscv into next
CI result shows no issue: https://source.denx.de/u-boot/custodians/u-boot-riscv/-/pipelines/22315 ---------------------------------------------------------------- - Aspeed: Add AST2700 board (Ibex RISC-V core) support - Add timer, dram controller, network support - Sophgo: Add clock controller support for Milk-V Duo
Diffstat (limited to 'include/configs')
-rw-r--r--include/configs/ibex_ast2700.h12
1 files changed, 12 insertions, 0 deletions
diff --git a/include/configs/ibex_ast2700.h b/include/configs/ibex_ast2700.h
new file mode 100644
index 00000000000..0f6850f7240
--- /dev/null
+++ b/include/configs/ibex_ast2700.h
@@ -0,0 +1,12 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) Aspeed Technology Inc.
+ */
+
+#ifndef __CONFIG_H
+#define __CONFIG_H
+
+#define CFG_SYS_UBOOT_BASE CONFIG_TEXT_BASE
+#define CFG_SYS_SDRAM_BASE 0x80000000
+
+#endif /* __CONFIG_H */