diff options
| author | Apurva Nandan <[email protected]> | 2023-04-12 16:28:54 +0530 |
|---|---|---|
| committer | Jagan Teki <[email protected]> | 2023-04-26 13:36:52 +0530 |
| commit | 44e2de0480a8a5a5780b6b200935a96b961b94e7 (patch) | |
| tree | 7210fae9d771758d0c1885efebd801a136b92cf1 /include/crypto/mscode.h | |
| parent | 562d166a13ca88cb55ef4f4ddb016e27b7cb0d2e (diff) | |
spi: cadence-quadspi: Fix check condition for DTR ops
buswidth and dtr fields in spi_mem_op are only valid when the
corresponding spi_mem_op phase has a non-zero length. For example,
SPI NAND core doesn't set buswidth when using SPI_MEM_OP_NO_ADDR
phase.
Fix the dtr checks in set_protocol() to ignore empty spi_mem_op
phases, as checking for dtr field in empty phase will result in
false negatives.
Signed-off-by: Apurva Nandan <[email protected]>
Signed-off-by: Dhruva Gole <[email protected]>
Reviewed-by: Jagan Teki <[email protected]>
Diffstat (limited to 'include/crypto/mscode.h')
0 files changed, 0 insertions, 0 deletions