diff options
| author | Bin Meng <[email protected]> | 2015-10-11 21:37:44 -0700 |
|---|---|---|
| committer | Simon Glass <[email protected]> | 2015-10-21 07:46:27 -0600 |
| commit | 638a05894169b07ea8f6d21b6925ca353ea6ebb7 (patch) | |
| tree | 68308063e00f4b803a07b9f55d56b2973edc2c7b /include/debug_uart.h | |
| parent | 8b185041a9f4c30dc5edb1e04c0834e931b8633f (diff) | |
x86: Enable mrc cache for bayleybay and minnowmax
Now that we have added MRC cache for Intel FSP and BayTrail codes,
enable it for all BayTrail boards (Bayley Bay and Minnow Max).
Note it turns out that FSP for Intel Atom E6xx does not produce
the HOB for NV storage, so we don't have such functionality on
Intel Crown Bay board.
Signed-off-by: Bin Meng <[email protected]>
Acked-by: Simon Glass <[email protected]>
Diffstat (limited to 'include/debug_uart.h')
0 files changed, 0 insertions, 0 deletions