diff options
| author | Marcel Ziswiler <[email protected]> | 2022-11-07 22:22:39 +0100 |
|---|---|---|
| committer | Stefano Babic <[email protected]> | 2022-11-08 17:35:00 +0100 |
| commit | 0b42fdca2d86939a51ff9eecedb930e42031c1e1 (patch) | |
| tree | 2994e7867bbdadec6e0795d5692d025703da337a /include/dt-bindings/clock | |
| parent | cb9b70fd2feaa415280445e049c037a7b9092b56 (diff) | |
imx8mp: synchronise device tree with linux
Synchronise device tree with linux v6.1-rc3.
Signed-off-by: Marcel Ziswiler <[email protected]>
Tested-By: Tim Harvey <[email protected]> #imx8m{m,n,p}-venice-*
Diffstat (limited to 'include/dt-bindings/clock')
| -rw-r--r-- | include/dt-bindings/clock/imx8mp-clock.h | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/include/dt-bindings/clock/imx8mp-clock.h b/include/dt-bindings/clock/imx8mp-clock.h index e8d68fbb6e3..9d5cc2ddde8 100644 --- a/include/dt-bindings/clock/imx8mp-clock.h +++ b/include/dt-bindings/clock/imx8mp-clock.h @@ -117,7 +117,6 @@ #define IMX8MP_CLK_AUDIO_AHB 108 #define IMX8MP_CLK_MIPI_DSI_ESC_RX 109 #define IMX8MP_CLK_IPG_ROOT 110 -#define IMX8MP_CLK_IPG_AUDIO_ROOT 111 #define IMX8MP_CLK_DRAM_ALT 112 #define IMX8MP_CLK_DRAM_APB 113 #define IMX8MP_CLK_VPU_G1 114 @@ -125,7 +124,6 @@ #define IMX8MP_CLK_CAN1 116 #define IMX8MP_CLK_CAN2 117 #define IMX8MP_CLK_MEMREPAIR 118 -#define IMX8MP_CLK_PCIE_PHY 119 #define IMX8MP_CLK_PCIE_AUX 120 #define IMX8MP_CLK_I2C5 121 #define IMX8MP_CLK_I2C6 122 @@ -182,8 +180,6 @@ #define IMX8MP_CLK_MEDIA_CAM2_PIX 173 #define IMX8MP_CLK_MEDIA_LDB 174 #define IMX8MP_CLK_MEDIA_MIPI_CSI2_ESC 175 -#define IMX8MP_CLK_PCIE2_CTRL 176 -#define IMX8MP_CLK_PCIE2_PHY 177 #define IMX8MP_CLK_MEDIA_MIPI_TEST_BYTE 178 #define IMX8MP_CLK_ECSPI3 179 #define IMX8MP_CLK_PDM 180 @@ -321,8 +317,15 @@ #define IMX8MP_CLK_AUDIO_AXI 310 #define IMX8MP_CLK_HSIO_AXI 311 #define IMX8MP_CLK_MEDIA_ISP 312 +#define IMX8MP_CLK_MEDIA_DISP2_PIX 313 +#define IMX8MP_CLK_CLKOUT1_SEL 314 +#define IMX8MP_CLK_CLKOUT1_DIV 315 +#define IMX8MP_CLK_CLKOUT1 316 +#define IMX8MP_CLK_CLKOUT2_SEL 317 +#define IMX8MP_CLK_CLKOUT2_DIV 318 +#define IMX8MP_CLK_CLKOUT2 319 -#define IMX8MP_CLK_END 313 +#define IMX8MP_CLK_END 320 #define IMX8MP_CLK_AUDIOMIX_SAI1_IPG 0 #define IMX8MP_CLK_AUDIOMIX_SAI1_MCLK1 1 |