Merge branch '2020-07-29-add-brcm-ns3-support'

- Add initial Broadcom NS3 SoC support.

2 files changed, 104 insertions, 0 deletions

diff --git a/include/dt-bindings/memory/bcm-ns3-mc.h b/include/dt-bindings/memory/bcm-ns3-mc.h
new file mode 100644
index 00000000000..84795ec27a4
--- /dev/null
+++ b/include/dt-bindings/memory/bcm-ns3-mc.h
@@ -0,0 +1,63 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (C) 2020 Broadcom
+ */
+
+#ifndef DT_BINDINGS_BCM_NS3_MC_H
+#define DT_BINDINGS_BCM_NS3_MC_H
+
+/*
+ * +--------+----------+ 0x8b000000
+ * | NITRO CRASH DUMP  |  32MB
+ * +--------+----------+ 0x8d000000
+ * | SHMEM (NS)         | 16 MB
+ * +-------------------+ 0x8e000000
+ * |        | TEE_RAM(S)| 4MB
+ * + TZDRAM +----------+ 0x8e400000
+ * |        | TA_RAM(S) | 12MB
+ * +--------+----------+ 0x8f000000
+ * | BL31 + TMON + LPM  |
+ * | memory             | 1MB
+ * +-------------------+ 0x8f100000
+ */
+
+#define BCM_NS3_MEM_NITRO_CRASH_START  0x8ae00000
+#define BCM_NS3_MEM_NITRO_CRASH_LEN    0x21fffff
+#define BCM_NS3_MEM_NITRO_CRASH_SIZE   0x2200000
+
+#define BCM_NS3_MEM_SHARE_START    0x8d000000
+#define BCM_NS3_MEM_SHARE_LEN      0x020fffff
+
+/* ATF/U-boot/Linux error logs */
+#define BCM_NS3_MEM_ELOG_START     0x8f113000
+#define BCM_NS3_MEM_ELOG_LEN       0x00100000
+
+/* CRMU Page table memroy */
+#define BCM_NS3_MEM_CRMU_PT_START  0x880000000
+#define BCM_NS3_MEM_CRMU_PT_LEN    0x200000
+
+/* default memory starting address and length */
+#define BCM_NS3_MEM_START          0x80000000UL
+#define BCM_NS3_MEM_LEN            0x80000000UL
+#define BCM_NS3_MEM_END            (BCM_NS3_MEM_START + BCM_NS3_MEM_LEN)
+
+/* memory starting address and length for BANK_1 */
+#define BCM_NS3_BANK_1_MEM_START   0x880000000UL
+#define BCM_NS3_BANK_1_MEM_LEN     0x180000000UL
+
+/* memory layout information */
+#define BCM_NS3_DDR_INFO_BASE      0x8f220000
+#define BCM_NS3_DDR_INFO_RSVD_LEN  0x1000
+#define BCM_NS3_DDR_INFO_LEN       73
+#define BCM_NS3_DDR_INFO_SIG       0x42434d44
+#define BCM_NS3_MAX_NR_BANKS       4
+
+#define BCM_NS3_GIC_LPI_BASE      0x8ad70000
+#define BCM_NS3_MEM_RSVE_START    BCM_NS3_GIC_LPI_BASE
+#define BCM_NS3_MEM_RSVE_END      ((BCM_NS3_MEM_ELOG_START + \
+				   BCM_NS3_MEM_ELOG_LEN) - \
+				   BCM_NS3_MEM_RSVE_START)
+
+#define BCM_NS3_CRMU_PGT_START    0x880000000UL
+#define BCM_NS3_CRMU_PGT_SIZE     0x100000
+#endif
diff --git a/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h b/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h
new file mode 100644
index 00000000000..81ebd58ca50
--- /dev/null
+++ b/include/dt-bindings/pinctrl/brcm,pinctrl-ns3.h
@@ -0,0 +1,41 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2020 Broadcom.
+ */
+
+#ifndef __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__
+#define __DT_BINDINGS_PINCTRL_BRCM_STINGRAY_H__
+
+/* Alternate functions available in MUX controller */
+#define MODE_NITRO				0
+#define MODE_NAND				1
+#define MODE_PNOR				2
+#define MODE_GPIO				3
+
+/* Pad configuration attribute */
+#define PAD_SLEW_RATE_ENA			BIT(0)
+#define PAD_SLEW_RATE_ENA_MASK			BIT(0)
+
+#define PAD_DRIVE_STRENGTH_2_MA			(0 << 1)
+#define PAD_DRIVE_STRENGTH_4_MA			BIT(1)
+#define PAD_DRIVE_STRENGTH_6_MA			(2 << 1)
+#define PAD_DRIVE_STRENGTH_8_MA			(3 << 1)
+#define PAD_DRIVE_STRENGTH_10_MA		(4 << 1)
+#define PAD_DRIVE_STRENGTH_12_MA		(5 << 1)
+#define PAD_DRIVE_STRENGTH_14_MA		(6 << 1)
+#define PAD_DRIVE_STRENGTH_16_MA		(7 << 1)
+#define PAD_DRIVE_STRENGTH_MASK			(7 << 1)
+
+#define PAD_PULL_UP_ENA				BIT(4)
+#define PAD_PULL_UP_ENA_MASK			BIT(4)
+
+#define PAD_PULL_DOWN_ENA			BIT(5)
+#define PAD_PULL_DOWN_ENA_MASK			BIT(5)
+
+#define PAD_INPUT_PATH_DIS			BIT(6)
+#define PAD_INPUT_PATH_DIS_MASK			BIT(6)
+
+#define PAD_HYSTERESIS_ENA			BIT(7)
+#define PAD_HYSTERESIS_ENA_MASK			BIT(7)
+
+#endif