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authorBenoît Thébaudeau <[email protected]>2012-08-08 03:55:32 +0000
committerStefano Babic <[email protected]>2012-09-23 19:57:13 +0200
commit5527024fdb10798d2975197f287457b29e2d4084 (patch)
tree2255a6b8aab740717826f9b28462fdb8baa82529 /include/linux/string.h
parent362635bd50e386770ebaa2d5d090eb8cbf96430b (diff)
KARO TX25: Fix NAND Flash R/W cycle times
The NAND Flash of the KARO TX25 board is a Samsung K9F1G08U0B with 25-ns R/W cycle times. However, the NFC clock for this board was set to 66.5 MHz, so using the NFC driver in symmetric mode (i.e. 1 NFC clock cycle = 1 NF R/W cycle) resulted in NF R/W cycle times of 15 ns, hence corrupted NF accesses. This patch fixes this issue by setting the NFC clock to the highest frequency complying to the 25-ns NF R/W cycle times specification, i.e. 33.25 MHz. Signed-off-by: Benoît Thébaudeau <[email protected]> Cc: John Rigby <[email protected]> Cc: Scott Wood <[email protected]> Cc: Stefano Babic <[email protected]> Cc: Daniel Gachet <[email protected]> Acked-by: Stefano Babic <[email protected]>
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