arm: socfpga: Add Cadence QSPI support to config header

With this driver enabled for SoCFPGA, access to SPI NOR flash is
supported.

The configuration (page size, timing info) will be taken from the
DT. See socrates as an example.

This QSPI supports depends on DT. So QSPI is only enabled if
CONFIG_OF_CONTROL is defined (see socfpga_socrates_defconfig).

Signed-off-by: Stefan Roese <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Vince Bridgers <[email protected]>
Cc: Marek Vasut <[email protected]>
Cc: Pavel Machek <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Jagannadha Sutradharudu Teki <[email protected]>

0 files changed, 0 insertions, 0 deletions