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| author | Tom Rini <[email protected]> | 2025-04-24 10:46:17 -0600 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2025-04-24 10:46:17 -0600 |
| commit | 10f48365112b164bee6564033ab682747efcb483 (patch) | |
| tree | 89bf3ab57fb9bd2f96376105629e6429d1533f34 /include/linux/zstd_errors.h | |
| parent | 629f089387adf7b0c39b77ac8d337cff7989f81d (diff) | |
| parent | f4baa55c5bee5a2eaedf80c8a84cc839230a9a73 (diff) | |
Merge patch series "Add PCIe support for TI AM64 SoC"
Hrushikesh Salunke <[email protected]> says:
TI's AM64 SoC has a single instance of Cadence PCIe Controller. This
series enables support for PCIe in AM64 SoC and to configure it in
Root-Complex mode of operation.
Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'include/linux/zstd_errors.h')
0 files changed, 0 insertions, 0 deletions