clk: thead: th1520-ap: Correctly handle flags for dividers

Unlike the gate clocks which make no use of flags, most dividers in
TH1520 SoC are one-based, thus are applied with CLK_DIVIDER_ONE_BASED
flag. We couldn't simply ignore the flag, which causes wrong results
when calculating the clock rates.

Add a member to ccu_div_internal for defining the flags, and pass it to
divider_recalc_rate(). With this fix, frequency of all the clocks match
the Linux kernel's calculation.

Fixes: e6bfa6fc94f ("clk: thead: Port clock controller driver of TH1520 SoC")
Signed-off-by: Yao Zi <[email protected]>
Acked-by: Leo Yu-Chi Liang <[email protected]>

0 files changed, 0 insertions, 0 deletions