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authorTom Rini <[email protected]>2025-12-04 09:39:11 -0600
committerTom Rini <[email protected]>2025-12-04 09:39:11 -0600
commit33750d8d88d519a6ec90da689776d8afccccf2c4 (patch)
treef7cd1fdbdd7c88eec85a1d1fbb566c8689c85d33 /include/linux
parent8eed8a355843897258c3f22727b32abe95464b08 (diff)
parentb30557b3b46c5162cb88a57907c517ed95557239 (diff)
Merge patch series "Add support for SM3 secure hash"
Heiko Schocher <[email protected]> says: Add SM3 secure hash, as specified by OSCCA GM/T 0004-2012 SM3 and described at https://datatracker.ietf.org/doc/html/draft-sca-cfrg-sm3-02 TPMv2 defines hash algo sm3_256, which is currently not supported and prevented TPMv2 chip with newer firmware to work with U-Boot. Seen this on a ST33TPHF2XI2C u-boot=> tpm2 init u-boot=> tpm2 autostart tpm2_get_pcr_info: too many pcrs: 5 Error: -90 u-boot=> Implement sm3 hash, so we can fix this problem. Link: https://lore.kernel.org/r/[email protected]
Diffstat (limited to 'include/linux')
-rw-r--r--include/linux/bitops.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/include/linux/bitops.h b/include/linux/bitops.h
index f826d7f3b34..29e0da48de8 100644
--- a/include/linux/bitops.h
+++ b/include/linux/bitops.h
@@ -148,6 +148,17 @@ static inline unsigned long hweight_long(unsigned long w)
return sizeof(w) == 4 ? generic_hweight32(w) : generic_hweight64(w);
}
+/**
+ * rol32 - rotate a 32-bit value left
+ * @word: value to rotate
+ * @shift: bits to roll
+ */
+
+static inline __u32 rol32(__u32 word, unsigned int shift)
+{
+ return (word << (shift & 31)) | (word >> ((-shift) & 31));
+}
+
#include <asm/bitops.h>
/* linux/include/asm-generic/bitops/non-atomic.h */