spi: dw: Force set K210 fifo length to 31

The Canaan Kendryte K210 SoC DW apb_ssi v4 spi controller is documented
to have a 32 word deep TX and RX FIFO, which spi_hw_init() detects.
However, when the RX FIFO is filled up to 32 entries (RXFLR = 32), an
RX FIFO overrun error occurs. Avoid this problem by force setting
fifo_len to 31.

Signed-off-by: Damien Le Moal <[email protected]>
Signed-off-by: Niklas Cassel <[email protected]>
Reviewed-by: Sean Anderson <[email protected]>

0 files changed, 0 insertions, 0 deletions