diff options
| author | Dave Liu <[email protected]> | 2009-03-14 12:48:19 +0800 |
|---|---|---|
| committer | Kumar Gala <[email protected]> | 2009-03-30 13:33:50 -0500 |
| commit | 6a8197836702991468cead5ead073f589e2623ad (patch) | |
| tree | da8979bf71471ade2083ad1a352a32f74a7234c4 /include/linux | |
| parent | 540dcf1cb86961e11aa92c47671f27762c581d8c (diff) | |
fsl-ddr: Fix two bugs in the ddr infrastructure
1. wr_lat
UM said the total write latency for DDR2 is equal to
WR_LAT + ADD_LAT, the write latency is CL + ADD_LAT - 1.
so, the WR_LAT = CL - 1;
2. rd_to_pre
we missed to add the ADD_LAT for DDR2 case.
Reported-by: Joakim Tjernlund <[email protected]>
Signed-off-by: Dave Liu <[email protected]>
Diffstat (limited to 'include/linux')
0 files changed, 0 insertions, 0 deletions