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authorPavel Machek <[email protected]>2014-09-08 14:08:45 +0200
committerMarek Vasut <[email protected]>2014-10-06 17:46:49 +0200
commita832ddba55f79801b6f75b79e96c3f5e1469335a (patch)
treee4c3dfcc5ec01dfad5167a0a739b09b4754d8502 /include/linux
parent0911af00b09c065444e4f8842a67a11c0d9b03cd (diff)
arm: socfpga: clock: Add code to read clock configuration
Add the entire bulk of code to read out clock configuration from the SoCFPGA CPU registers. This is important for MMC, QSPI and UART drivers as otherwise they cannot determine the frequency of their upstream clock. Signed-off-by: Pavel Machek <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Cc: Chin Liang See <[email protected]> Cc: Dinh Nguyen <[email protected]> Cc: Albert Aribaud <[email protected]> Cc: Tom Rini <[email protected]> Cc: Wolfgang Denk <[email protected]> Cc: Pavel Machek <[email protected]> V2: Fixed the L4 MP clock divider and synced the clock code with latest rocketboards codebase (thanks Dinh for pointing this out)
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