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authorStefano Babic <[email protected]>2015-07-17 11:22:56 +0200
committerStefano Babic <[email protected]>2015-07-17 11:22:56 +0200
commitf448c5d3200372fa73f340144d013fdecf4e2f1f (patch)
treeb17b66f67a22b553f66bcb22e69d62cb2a5bbe7e /include/pci.h
parent425640256a7c5e9259f7583ee4eca1f3b70f8032 (diff)
parent605e15db2b54302364a2528d3c6604fbc57be846 (diff)
Merge branch 'master' of git://git.denx.de/u-boot
Diffstat (limited to 'include/pci.h')
-rw-r--r--include/pci.h19
1 files changed, 10 insertions, 9 deletions
diff --git a/include/pci.h b/include/pci.h
index 07b1e9a4f54..542e68bceb9 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -513,6 +513,16 @@ struct pci_controller {
int indirect_type;
+ /*
+ * TODO([email protected]): With driver model we use struct
+ * pci_controller for both the controller and any bridge devices
+ * attached to it. But there is only one region list and it is in the
+ * top-level controller.
+ *
+ * This could be changed so that struct pci_controller is only used
+ * for PCI controllers and a separate UCLASS (or perhaps
+ * UCLASS_PCI_GENERIC) is used for bridges.
+ */
struct pci_region regions[MAX_PCI_REGIONS];
int region_count;
@@ -712,15 +722,6 @@ void pci_write_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum,
u32 pci_read_bar32(struct pci_controller *hose, pci_dev_t dev, int barnum);
/**
- * pciauto_setup_rom() - Set up access to a device ROM
- *
- * @hose: PCI hose to use
- * @dev: PCI device to adjust
- * @return 0 if done, -ve on error
- */
-int pciauto_setup_rom(struct pci_controller *hose, pci_dev_t dev);
-
-/**
* pci_hose_find_devices() - Find devices by vendor/device ID
*
* @hose: PCI hose to search