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authorTom Rini <[email protected]>2020-01-06 17:07:49 -0500
committerTom Rini <[email protected]>2020-01-06 17:07:49 -0500
commit5a8fa095cb848c60c630a83edf30d4fc46101e90 (patch)
tree66652768520899ddea6a24a608c1be4ed6ecfcde /include/power
parent0b0c6af38738f2c132cfd41a240889acaa031c8f (diff)
parent8fbbec12f7d2c18f8883f3371cfca74a98b5dd87 (diff)
Merge branch 'next'
Bring in the following merges: commit 8fbbec12f7d2c18f8883f3371cfca74a98b5dd87 Merge: 87f69f467a83 63618e71e89b Author: Tom Rini <[email protected]> Date: Fri Jan 3 09:48:47 2020 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-fsl-qoriq into next - updates and fixes on ls1028a, lx2, ls1046a, MC-DPSPARSER support commit 87f69f467a8335b171c71bf217d2625d515acd7c Merge: c0912f9bbfb2 4466b9970319 Author: Tom Rini <[email protected]> Date: Tue Dec 24 08:18:19 2019 -0500 Merge https://gitlab.denx.de/u-boot/custodians/u-boot-mpc85xx into next - Enable DM driver on ppc/km boards - Enable DM_USB for some of NXP powerpc platforms: P5040, T4240, T208x, T104x, P4080, P2041, P2020, P1020, P3041 - Some updates in mpc85xx-ddr driver, km boards commit c0912f9bbfb26dd03d189953678691b799d35b6e Merge: 533c9f5714bd a1d6dc3f8407 Author: Tom Rini <[email protected]> Date: Wed Dec 18 07:20:19 2019 -0500 Merge branch 'next' of https://gitlab.denx.de/u-boot/custodians/u-boot-x86 into next - Various x86 common codes updated for TPL/SPL - I2C designware driver updated for PCI - ICH SPI driver updated to support Apollo Lake - Add Intel FSP2 base support - Intel Apollo Lake platform specific drivers support - Add a new board Google Chromebook Coral commit 533c9f5714bdba79dc6f2629284d4c1a08a611d1 Merge: 553cb0688782 033e18b47bd0 Author: Tom Rini <[email protected]> Date: Tue Dec 17 07:53:08 2019 -0500 Merge tag '20191217-for-next' of https://gitlab.denx.de/u-boot/custodians/u-boot-i2c into next i2c: for next - misc: i2c_eeprom: Add partition support and add ability to query size of eeprom device and partitions - i2c common: add support for offset overflow in to address and add sandbox tests for it. commit 553cb06887825314e74a9bdac337467c77d1db88 Merge: f39abbbc531e b4f98b3b16ec Author: Tom Rini <[email protected]> Date: Thu Dec 12 08:18:59 2019 -0500 Merge tag 'dm-next-13dec19' of https://gitlab.denx.de/u-boot/custodians/u-boot-dm into next buildman improvements including toolchain environment feature sandbox unicode support in serial
Diffstat (limited to 'include/power')
-rw-r--r--include/power/acpi_pmc.h185
1 files changed, 185 insertions, 0 deletions
diff --git a/include/power/acpi_pmc.h b/include/power/acpi_pmc.h
new file mode 100644
index 00000000000..1f50c23f5f8
--- /dev/null
+++ b/include/power/acpi_pmc.h
@@ -0,0 +1,185 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Copyright 2019 Google LLC
+ */
+
+#ifndef __ACPI_PMC_H
+#define __ACPI_PMC_H
+
+enum {
+ GPE0_REG_MAX = 4,
+};
+
+/**
+ * struct acpi_pmc_upriv - holds common data for the x86 PMC
+ *
+ * @pmc_bar0: Base address 0 of PMC
+ * @pmc_bar1: Base address 2 of PMC
+ * @acpi_base: Base address of ACPI block
+ * @pm1_sts: PM1 status
+ * @pm1_en: PM1 enable
+ * @pm1_cnt: PM1 control
+ * @gpe_cfg: Address of GPE_CFG register
+ * @gpe0_dwx_mask: Mask to use for each GPE0 (typically 7 or 0xf)
+ * @gpe0_dwx_shift_base: Base shift value to use for GPE0 (0 or 4)
+ * @gpe0_sts_req: GPE0 status register offset
+ * @gpe0_en_req: GPE0 enable register offset
+ * @gpe0_sts: GPE0 status values
+ * @gpe0_en: GPE0 enable values
+ * @gpe0_dw: GPE0 DW values
+ * @gpe0_count: Number of GPE0 registers
+ * @tco1_sts: TCO1 status
+ * @tco2_sts: TCO2 status
+ * @prsts: Power and reset status
+ * @gen_pmcon1: General power mgmt configuration 1
+ * @gen_pmcon2: General power mgmt configuration 2
+ * @gen_pmcon3: General power mgmt configuration 3
+ */
+struct acpi_pmc_upriv {
+ void *pmc_bar0;
+ void *pmc_bar2;
+ u32 acpi_base;
+ u16 pm1_sts;
+ u16 pm1_en;
+ u32 pm1_cnt;
+ u32 *gpe_cfg;
+ u32 gpe0_dwx_mask;
+ u32 gpe0_dwx_shift_base;
+ u32 gpe0_sts_reg;
+ u32 gpe0_en_reg;
+ u32 gpe0_sts[GPE0_REG_MAX];
+ u32 gpe0_en[GPE0_REG_MAX];
+ u32 gpe0_dw[GPE0_REG_MAX];
+ int gpe0_count;
+ u16 tco1_sts;
+ u16 tco2_sts;
+ u32 prsts;
+ u32 gen_pmcon1;
+ u32 gen_pmcon2;
+ u32 gen_pmcon3;
+};
+
+struct acpi_pmc_ops {
+ /**
+ * init() - Set up the PMC for use
+ *
+ * This reads the current state of the PMC. Most of the state is read
+ * automatically by the uclass since it is common.
+ *
+ * This is optional.
+ *
+ * @dev: PMC device to use
+ * @return 0 if OK, -ve on error
+ */
+ int (*init)(struct udevice *dev);
+
+ /**
+ * prev_sleep_state() - Get the previous sleep state (optional)
+ *
+ * This reads various state registers and returns the sleep state from
+ * which the system woke. If this method is not provided, the uclass
+ * will return a calculated value.
+ *
+ * This is optional.
+ *
+ * @dev: PMC device to use
+ * @prev_sleep_state: Previous sleep state as calculated by the uclass.
+ * The method can use this as the return value or calculate its
+ * own.
+ *
+ * @return enum acpi_sleep_state indicating the previous sleep state
+ * (ACPI_S0, ACPI_S3 or ACPI_S5), or -ve on error
+ */
+ int (*prev_sleep_state)(struct udevice *dev, int prev_sleep_state);
+
+ /**
+ * disable_tco() - Disable the timer/counter
+ *
+ * Disables the timer/counter in the PMC
+ *
+ * This is optional.
+ *
+ * @dev: PMC device to use
+ * @return 0
+ */
+ int (*disable_tco)(struct udevice *dev);
+
+ /**
+ * global_reset_set_enable() - Enable/Disable global reset
+ *
+ * Enable or disable global reset. If global reset is enabled, both hard
+ * reset and soft reset will trigger global reset, where both host and
+ * TXE are reset. This is cleared on cold boot, hard reset, soft reset
+ * and Sx.
+ *
+ * This is optional.
+ *
+ * @dev: PMC device to use
+ * @enable: true to enable global reset, false to disable
+ * @return 0
+ */
+ int (*global_reset_set_enable)(struct udevice *dev, bool enable);
+};
+
+#define acpi_pmc_get_ops(dev) ((struct acpi_pmc_ops *)(dev)->driver->ops)
+
+/**
+ * init() - Set up the PMC for use
+ *
+ * This reads the current state of the PMC. This reads in the common registers,
+ * then calls the device's init() method to read the SoC-specific registers.
+ *
+ * @return 0 if OK, -ve on error
+ */
+int pmc_init(struct udevice *dev);
+
+/**
+ * pmc_prev_sleep_state() - Get the previous sleep state
+ *
+ * This reads various state registers and returns the sleep state from
+ * which the system woke.
+ *
+ * @return enum acpi_sleep_state indicating the previous sleep state
+ * (ACPI_S0, ACPI_S3 or ACPI_S5), or -ve on error
+ */
+int pmc_prev_sleep_state(struct udevice *dev);
+
+/**
+ * pmc_disable_tco() - Disable the timer/counter
+ *
+ * Disables the timer/counter in the PMC
+ *
+ * @dev: PMC device to use
+ * @return 0
+ */
+int pmc_disable_tco(struct udevice *dev);
+
+/**
+ * pmc_global_reset_set_enable() - Enable/Disable global reset
+ *
+ * Enable or disable global reset. If global reset is enabled, both hard
+ * reset and soft reset will trigger global reset, where both host and
+ * TXE are reset. This is cleared on cold boot, hard reset, soft reset
+ * and Sx.
+ *
+ * @dev: PMC device to use
+ * @enable: true to enable global reset, false to disable
+ * @return 0
+ */
+int pmc_global_reset_set_enable(struct udevice *dev, bool enable);
+
+int pmc_ofdata_to_uc_platdata(struct udevice *dev);
+
+int pmc_disable_tco_base(ulong tco_base);
+
+void pmc_dump_info(struct udevice *dev);
+
+/**
+ * pmc_gpe_init() - Set up general-purpose events
+ *
+ * @dev: PMC device
+ * @return 0 if OK, -ve on error
+ */
+int pmc_gpe_init(struct udevice *dev);
+
+#endif