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authorYe.Li <[email protected]>2014-08-20 17:18:24 +0800
committerStefano Babic <[email protected]>2014-09-09 16:30:40 +0200
commit4aa7ac30a7173934f32db466bd4592cd292e7cc9 (patch)
tree14572029507d437b8ddf842bd1d66c4b2ad233e5 /include/stdio_dev.h
parentdc73cbe7b05851a3ff76beabdc0589d2b3ebb9a3 (diff)
iMX6: Disable the L2 before chaning the PL310 latency
The Latency parameters of PL310 Tag RAM latency control register and Data RAM Latency control register are set in L2 cache enable. And setting these registers must have PL310 NOT enabled. But when using Plugin mode boot, the PL310 is enabled by bootrom. The patch disables the PL310 before applying this setting. Signed-off-by: Ye.Li <[email protected]>
Diffstat (limited to 'include/stdio_dev.h')
0 files changed, 0 insertions, 0 deletions