diff options
| author | Tom Rini <[email protected]> | 2018-12-03 19:30:54 -0500 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2018-12-03 19:30:54 -0500 |
| commit | 0a3d59e01038a3a50484b8bfcf834376a7215af0 (patch) | |
| tree | fc58f6aa543d4f920d1b4b36dc52c534d6dc1afc /include | |
| parent | 9981c60ef583f3608eff8ab4837198f72240ea17 (diff) | |
| parent | 5f68f44c14ab93ffc44a9285e0970cba467276c6 (diff) | |
Merge tag 'xilinx-for-v2019.01' of git://git.denx.de/u-boot-microblaze
Xilinx changes for v2019.01
microblaze:
- Use default functions for memory decoding
- Showing model from DT
zynq:
- Fix spi flash DTs
- Fix zynq_help_text with CONFIG_SYS_LONGHELP
- Tune cse/mini configurations
- Enabling cse/mini testing with current targets
zynqmp:
- Enable gzip SPL support
- Fix chip detection logic
- Tune mini configurations
- DT fixes(spi-flash, models, clocks, etc)
- Add support for OF_SEPARATE configurations
- Enabling mini testing with current targets
- Add mini mtest configuration
- Some minor config setting
nand:
- arasan: Add subpage configuration
net:
- gem: Add 64bit DMA support
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/xilinx_zynqmp_mini.h | 3 | ||||
| -rw-r--r-- | include/configs/xilinx_zynqmp_zcu104_revC.h | 17 |
2 files changed, 20 insertions, 0 deletions
diff --git a/include/configs/xilinx_zynqmp_mini.h b/include/configs/xilinx_zynqmp_mini.h index 00ca3d4be82..7138851daef 100644 --- a/include/configs/xilinx_zynqmp_mini.h +++ b/include/configs/xilinx_zynqmp_mini.h @@ -12,9 +12,12 @@ #define CONFIG_SYS_MEMTEST_SCRATCH 0xfffc0000 +#define CONFIG_EXTRA_ENV_SETTINGS + #include <configs/xilinx_zynqmp.h> /* Undef unneeded configs */ +#undef CONFIG_BOOTCOMMAND #undef CONFIG_EXTRA_ENV_SETTINGS #undef CONFIG_SYS_MALLOC_LEN #undef CONFIG_ZLIB diff --git a/include/configs/xilinx_zynqmp_zcu104_revC.h b/include/configs/xilinx_zynqmp_zcu104_revC.h new file mode 100644 index 00000000000..8b3ae36d0f3 --- /dev/null +++ b/include/configs/xilinx_zynqmp_zcu104_revC.h @@ -0,0 +1,17 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Configuration for Xilinx ZynqMP zcu104 + * + * (C) Copyright 2018 Xilinx, Inc. + * Michal Simek <[email protected]> + */ + +#ifndef __CONFIG_ZYNQMP_ZCU104_REVC_H +#define __CONFIG_ZYNQMP_ZCU104_REVC_H + +#include <configs/xilinx_zynqmp_zcu104.h> + +#define CONFIG_ZYNQ_GEM_EEPROM_ADDR 0x54 +#define CONFIG_ZYNQ_EEPROM_BUS 1 + +#endif /* __CONFIG_ZYNQMP_ZCU104_REVC_H */ |