Merge branch '2021-12-27-CONFIG-migrations' into next

- Merge a large number of CONFIG migration patches. Most of these are taking existing migrations and re-running them. A few of these needed additional minor conversions done first, so that more complex dependencies could be expressed. In the end we now have CI jobs to ensure that no migrated symbols are used in board config header files.
author: Tom Rini <[email protected]> 2021-12-27 17:20:21 -0500
committer: Tom Rini <[email protected]> 2021-12-27 17:20:21 -0500
commit: 111a8b57354bb5aff55635502a0cdf74cb63e835 (patch)
tree: cbdb6857df2ae710e4cf3f7103195d39b6e3fd54 /include
parent: bc0abd80b3c2d395a0245d4e1ce4f8f445f79cde (diff)
parent: 5e2fd60b97b3a67a9bbcfe8910b59b2b44d1c9a0 (diff)
260 files changed, 69 insertions, 1512 deletions
diff --git a/include/clock_legacy.h b/include/clock_legacy.h
index 29261b680d0..efa483117da 100644
--- a/include/clock_legacy.h
+++ b/include/clock_legacy.h
@@ -22,4 +22,15 @@ unsigned long get_board_ddr_clk(void);
 #define get_board_ddr_clk()		CONFIG_DDR_CLK_FREQ
 #endif
 
+/*
+ * If we have CONFIG_DYNAMIC_SYS_CLK_FREQ then there will be an
+ * implentation of get_board_sys_clk() somewhere.  Otherwise we have
+ * a static value to use now.
+ */
+#ifdef CONFIG_DYNAMIC_SYS_CLK_FREQ
+unsigned long get_board_sys_clk(void);
+#else
+#define get_board_sys_clk()		CONFIG_SYS_CLK_FREQ
+#endif
+
 #endif
diff --git a/include/configs/M5208EVBE.h b/include/configs/M5208EVBE.h
index 6a69ac45aee..5ed624c7b76 100644
--- a/include/configs/M5208EVBE.h
+++ b/include/configs/M5208EVBE.h
@@ -15,7 +15,6 @@
  */
 #define CONFIG_SYS_UART_PORT		(0)
 
-#undef CONFIG_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT		5000
 
 #ifdef CONFIG_MCFFEC
@@ -39,7 +38,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
 
 #define CONFIG_UDP_CHECKSUM
 
diff --git a/include/configs/M5235EVB.h b/include/configs/M5235EVB.h
index 7421f3b7605..90f1664a5ae 100644
--- a/include/configs/M5235EVB.h
+++ b/include/configs/M5235EVB.h
@@ -20,7 +20,6 @@
 
 #define CONFIG_SYS_UART_PORT		(0)
 
-#undef CONFIG_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT	5000	/* timeout in milliseconds, max timeout is 6.71sec */
 
 /*
@@ -48,7 +47,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
 #define CONFIG_SYS_I2C_PINMUX_REG	(gpio->par_qspi)
 #define CONFIG_SYS_I2C_PINMUX_CLR	~(GPIO_PAR_FECI2C_SCL_MASK | GPIO_PAR_FECI2C_SDA_MASK)
 #define CONFIG_SYS_I2C_PINMUX_SET	(GPIO_PAR_FECI2C_SCL_I2CSCL | GPIO_PAR_FECI2C_SDA_I2CSDA)
diff --git a/include/configs/M5249EVB.h b/include/configs/M5249EVB.h
index 7ee0ec6a4a8..00892ec44dc 100644
--- a/include/configs/M5249EVB.h
+++ b/include/configs/M5249EVB.h
@@ -21,8 +21,6 @@
 
 #define CONFIG_SYS_UART_PORT		(0)
 
-#undef  CONFIG_WATCHDOG
-
 #undef CONFIG_MONITOR_IS_IN_RAM		/* no pre-loader required!!! ;-) */
 
 /*
diff --git a/include/configs/M5253DEMO.h b/include/configs/M5253DEMO.h
index e9a79229219..c5d8aa3edab 100644
--- a/include/configs/M5253DEMO.h
+++ b/include/configs/M5253DEMO.h
@@ -12,8 +12,6 @@
 
 #define CONFIG_SYS_UART_PORT		(0)
 
-#undef CONFIG_WATCHDOG		/* disable watchdog */
-
 
 /* Configuration for environment
  * Environment is embedded in u-boot in the second sector of the flash
@@ -69,7 +67,6 @@
 #define CONFIG_HOSTNAME		"M5253DEMO"
 
 /* I2C */
-#define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
 #define CONFIG_SYS_I2C_PINMUX_REG	(*(u32 *) (CONFIG_SYS_MBAR+0x19C))
 #define CONFIG_SYS_I2C_PINMUX_CLR	(0xFFFFE7FF)
 #define CONFIG_SYS_I2C_PINMUX_SET	(0)
diff --git a/include/configs/M5272C3.h b/include/configs/M5272C3.h
index 2121b294fb5..e814a2924c6 100644
--- a/include/configs/M5272C3.h
+++ b/include/configs/M5272C3.h
@@ -20,7 +20,6 @@
 
 #define CONFIG_SYS_UART_PORT		(0)
 
-#undef CONFIG_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT 10000	/* timeout in milliseconds */
 
 #undef CONFIG_MONITOR_IS_IN_RAM	/* define if monitor is started from a pre-loader */
diff --git a/include/configs/M5275EVB.h b/include/configs/M5275EVB.h
index 7ca916485b1..b18f0319b09 100644
--- a/include/configs/M5275EVB.h
+++ b/include/configs/M5275EVB.h
@@ -58,7 +58,6 @@
 #endif
 
 /* I2C */
-#define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
 #define CONFIG_SYS_I2C_PINMUX_REG	(gpio_reg->par_feci2c)
 #define CONFIG_SYS_I2C_PINMUX_CLR	(0xFFF0)
 #define CONFIG_SYS_I2C_PINMUX_SET	(0x000F)
diff --git a/include/configs/M53017EVB.h b/include/configs/M53017EVB.h
index 7b33677c551..5db189ae2db 100644
--- a/include/configs/M53017EVB.h
+++ b/include/configs/M53017EVB.h
@@ -20,7 +20,6 @@
 
 #define CONFIG_SYS_UART_PORT		(0)
 
-#undef CONFIG_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT		5000
 
 #define CONFIG_SYS_UNIFY_CACHE
@@ -54,7 +53,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
 
 #define CONFIG_UDP_CHECKSUM
 
diff --git a/include/configs/M5329EVB.h b/include/configs/M5329EVB.h
index 19d8cfe3217..f96f54ef65b 100644
--- a/include/configs/M5329EVB.h
+++ b/include/configs/M5329EVB.h
@@ -20,7 +20,6 @@
 
 #define CONFIG_SYS_UART_PORT		(0)
 
-#undef CONFIG_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT	5000	/* timeout in milliseconds, max timeout is 6.71sec */
 
 #define CONFIG_SYS_UNIFY_CACHE
@@ -48,7 +47,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
 
 #define CONFIG_UDP_CHECKSUM
 
@@ -137,10 +135,6 @@
 #	define CONFIG_SYS_NAND_SIZE		1
 #	define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
 #	define NAND_ALLOW_ERASE_ALL	1
-#	define CONFIG_JFFS2_NAND	1
-#	define CONFIG_JFFS2_DEV		"nand0"
-#	define CONFIG_JFFS2_PART_SIZE	(CONFIG_SYS_CS2_MASK & ~1)
-#	define CONFIG_JFFS2_PART_OFFSET	0x00000000
 #endif
 
 #define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_CS0_BASE
diff --git a/include/configs/M5373EVB.h b/include/configs/M5373EVB.h
index e2ddc4893e7..b7906013e09 100644
--- a/include/configs/M5373EVB.h
+++ b/include/configs/M5373EVB.h
@@ -22,7 +22,6 @@
 
 #define CONFIG_SYS_UART_PORT		(0)
 
-#undef CONFIG_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT	3360	/* timeout in ms, max is 3.36 sec */
 
 #define CONFIG_SYS_UNIFY_CACHE
@@ -50,7 +49,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR		CONFIG_SYS_MBAR
 
 #define CONFIG_UDP_CHECKSUM
 
@@ -139,10 +137,6 @@
 #	define CONFIG_SYS_NAND_SIZE		1
 #	define CONFIG_SYS_NAND_BASE_LIST	{ CONFIG_SYS_NAND_BASE }
 #	define NAND_ALLOW_ERASE_ALL	1
-#	define CONFIG_JFFS2_NAND	1
-#	define CONFIG_JFFS2_DEV		"nand0"
-#	define CONFIG_JFFS2_PART_SIZE	(CONFIG_SYS_CS2_MASK & ~1)
-#	define CONFIG_JFFS2_PART_OFFSET	0x00000000
 #endif
 
 #define CONFIG_SYS_FLASH_BASE		CONFIG_SYS_CS0_BASE
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h
index 1cf36705331..9a34e5444b1 100644
--- a/include/configs/MPC837XERDB.h
+++ b/include/configs/MPC837XERDB.h
@@ -302,8 +302,6 @@
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
 
-#undef CONFIG_WATCHDOG		/* watchdog disabled */
-
 #ifdef CONFIG_MMC
 #define CONFIG_FSL_ESDHC_PIN_MUX
 #define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC83xx_ESDHC_ADDR
@@ -326,7 +324,6 @@
  */
 
 #define CONFIG_HAS_FSL_DR_USB
-#define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 
 #define CONFIG_NETDEV		"eth1"
diff --git a/include/configs/MPC8540ADS.h b/include/configs/MPC8540ADS.h
index ab029aab64f..84e05eafa61 100644
--- a/include/configs/MPC8540ADS.h
+++ b/include/configs/MPC8540ADS.h
@@ -26,8 +26,6 @@
 #define CONFIG_HAS_FEC		1	/* 8540 has FEC */
 #endif
 
-#define CONFIG_SYS_PCI_64BIT	1	/* enable 64-bit PCI resources */
-
 /*
  * sysclk for MPC85xx
  *
@@ -46,10 +44,6 @@
  * Note that PCI-X won't work at 33MHz.
  */
 
-#ifndef CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_CLK_FREQ	33000000
-#endif
-
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
@@ -266,8 +260,6 @@
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
 
-#undef CONFIG_WATCHDOG			/* watchdog disabled */
-
 /*
  * Miscellaneous configurable options
  */
diff --git a/include/configs/MPC8548CDS.h b/include/configs/MPC8548CDS.h
index 349b4860ef8..f583aa8b36d 100644
--- a/include/configs/MPC8548CDS.h
+++ b/include/configs/MPC8548CDS.h
@@ -19,15 +19,12 @@
 #define CONFIG_PCI1		/* PCI controller 1 */
 #define CONFIG_PCIE1		/* PCIE controller 1 (slot 1) */
 #undef CONFIG_PCI2
-#define CONFIG_SYS_PCI_64BIT	1	/* enable 64-bit PCI resources */
 
 #define CONFIG_INTERRUPTS		/* enable pci, srio, ddr interrupts */
 
 #ifndef __ASSEMBLY__
 #include <linux/stringify.h>
-extern unsigned long get_clock_freq(void);
 #endif
-#define CONFIG_SYS_CLK_FREQ	get_clock_freq() /* sysclk for MPC85xx */
 
 /*
  * These can be toggled for performance analysis, otherwise use default.
@@ -384,8 +381,6 @@ extern unsigned long get_clock_freq(void);
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
 
-#undef CONFIG_WATCHDOG			/* watchdog disabled */
-
 /*
  * Miscellaneous configurable options
  */
diff --git a/include/configs/MPC8560ADS.h b/include/configs/MPC8560ADS.h
index 2167dcd4444..b8a72d01dd8 100644
--- a/include/configs/MPC8560ADS.h
+++ b/include/configs/MPC8560ADS.h
@@ -27,7 +27,6 @@
  * assume U-Boot is less than 0.5MB
  */
 
-#define CONFIG_SYS_PCI_64BIT	1	/* enable 64-bit PCI resources */
 #define CONFIG_RESET_PHY_R	1	/* Call reset_phy() */
 
 /*
@@ -44,10 +43,6 @@
  * in the README.mpc85xxads.
  */
 
-#ifndef CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_CLK_FREQ	33000000
-#endif
-
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
@@ -253,8 +248,6 @@
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
 
-#undef CONFIG_WATCHDOG			/* watchdog disabled */
-
 /*
  * Miscellaneous configurable options
  */
diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h
index d36a8e2dc84..6a9c86c9c4f 100644
--- a/include/configs/P1010RDB.h
+++ b/include/configs/P1010RDB.h
@@ -63,19 +63,16 @@
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	((768 << 10) - 0x2000)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x00200000 - CONFIG_SPL_MAX_SIZE)
 #define CONFIG_SYS_NAND_U_BOOT_START	0x00200000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	0
 #else
 #ifdef CONFIG_TPL_BUILD
 #define CONFIG_SPL_FLUSH_IMAGE
 #define CONFIG_SPL_NAND_INIT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
-#define CONFIG_TPL_TEXT_BASE		0xD0001000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(576 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_START	(0x11000000)
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	((128 + 128) << 10)
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_NAND_MINIMAL
@@ -84,7 +81,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(128 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	0xD0000000
 #define CONFIG_SYS_NAND_U_BOOT_START	0xD0000000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	(128 << 10)
 #endif
 #define CONFIG_SPL_PAD_TO	0x20000
 #define CONFIG_TPL_PAD_TO	0x20000
@@ -102,7 +98,7 @@
 #endif
 
 #ifdef CONFIG_TPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_TPL_TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE	0xD0001000
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SPL_TEXT_BASE
 #else
@@ -110,12 +106,10 @@
 #endif
 
 /* High Level Configuration Options */
-#define CONFIG_SYS_HAS_SERDES		/* common SERDES init code */
 
 #if defined(CONFIG_PCI)
 #define CONFIG_PCIE1			/* PCIE controller 1 (slot 1) */
 #define CONFIG_PCIE2			/* PCIE controller 2 (slot 2) */
-#define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
 
 /*
  * PCI Windows
@@ -152,8 +146,6 @@
 #define CONFIG_PCI_SCAN_SHOW		/* show pci devices on startup */
 #endif
 
-#define CONFIG_SYS_CLK_FREQ	66666666 /* SYSCLK for P1010 RDB */
-
 #define CONFIG_HWCONFIG
 /*
  * These can be toggled for performance analysis, otherwise use default.
@@ -573,7 +565,6 @@ extern unsigned long get_sdram_size(void);
 #if defined(CONFIG_HAS_FSL_DR_USB)
 #ifdef CONFIG_USB_EHCI_HCD
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_USB_EHCI_FSL
 #endif
 #endif
 
@@ -597,8 +588,6 @@ extern unsigned long get_sdram_size(void);
 #define CONFIG_LOADS_ECHO		/* echo on for serial download */
 #define CONFIG_SYS_LOADS_BAUD_CHANGE	/* allow baudrate change */
 
-#undef CONFIG_WATCHDOG			/* watchdog disabled */
-
 #if defined(CONFIG_MMC) || defined(CONFIG_USB_EHCI_HCD) \
 		 || defined(CONFIG_FSL_SATA)
 #endif
diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h
index ef4bb0b7b0c..8ada25dcc7a 100644
--- a/include/configs/P2041RDB.h
+++ b/include/configs/P2041RDB.h
@@ -36,7 +36,6 @@
 #define CONFIG_PCIE1			/* PCIE controller 1 */
 #define CONFIG_PCIE2			/* PCIE controller 2 */
 #define CONFIG_PCIE3			/* PCIE controller 3 */
-#define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
 
 #define CONFIG_SYS_SRIO
 #define CONFIG_SRIO1			/* SRIO port 1 */
@@ -50,10 +49,8 @@
 #endif
 
 #ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(unsigned long dummy);
 #include <linux/stringify.h>
 #endif
-#define CONFIG_SYS_CLK_FREQ	get_board_sys_clk(0)
 
 /*
  * These can be toggled for performance analysis, otherwise use default.
@@ -395,7 +392,6 @@ unsigned long get_board_sys_clk(unsigned long dummy);
 #define CONFIG_HAS_FSL_MPH_USB
 
 #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
-#define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #endif
 
diff --git a/include/configs/SBx81LIFKW.h b/include/configs/SBx81LIFKW.h
index bf9f26ea999..dbaffc635d2 100644
--- a/include/configs/SBx81LIFKW.h
+++ b/include/configs/SBx81LIFKW.h
@@ -6,25 +6,16 @@
 #ifndef _CONFIG_SBX81LIFKW_H
 #define _CONFIG_SBX81LIFKW_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_FEROCEON_88FR131	1	/* CPU Core subversion */
-#define CONFIG_KW88F6281	1	/* SOC Name */
-#define CONFIG_SYS_KWD_CONFIG	$(CONFIG_BOARDDIR)/kwbimage.cfg
-
 /* additions for new ARM relocation support */
 #define CONFIG_SYS_SDRAM_BASE	0x00000000
 
 #define CONFIG_KIRKWOOD_EGIGA_INIT	/* Enable GbePort0/1 for kernel */
 #define CONFIG_KIRKWOOD_PCIE_INIT	/* Enable PCIE Port0 */
 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8	/* Set RGMII Pad voltage to 1.8V */
-#define CONFIG_KIRKWOOD_GPIO	1
 
 /*
  * NS16550 Configuration
  */
-#define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
@@ -61,7 +52,6 @@
  * Ethernet Driver configuration
  */
 #ifdef CONFIG_CMD_NET
-#define CONFIG_MVGBE	/* Enable kirkwood Gbe Controller Driver */
 #define CONFIG_MVGBE_PORTS	{1, 0}	/* enable a single port */
 #define CONFIG_PHY_BASE_ADR	0x01
 #endif /* CONFIG_CMD_NET */
diff --git a/include/configs/SBx81LIFXCAT.h b/include/configs/SBx81LIFXCAT.h
index 71394aea22c..bbd3ccc6d9d 100644
--- a/include/configs/SBx81LIFXCAT.h
+++ b/include/configs/SBx81LIFXCAT.h
@@ -6,25 +6,16 @@
 #ifndef _CONFIG_SBX81LIFXCAT_H
 #define _CONFIG_SBX81LIFXCAT_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_FEROCEON_88FR131	1	/* CPU Core subversion */
-#define CONFIG_KW88F6281	1	/* SOC Name */
-#define CONFIG_SYS_KWD_CONFIG	$(CONFIG_BOARDDIR)/kwbimage.cfg
-
 /* additions for new ARM relocation support */
 #define CONFIG_SYS_SDRAM_BASE	0x00000000
 
 #define CONFIG_KIRKWOOD_EGIGA_INIT	/* Enable GbePort0/1 for kernel */
 #define CONFIG_KIRKWOOD_PCIE_INIT	/* Enable PCIE Port0 */
 #define CONFIG_KIRKWOOD_RGMII_PAD_1V8	/* Set RGMII Pad voltage to 1.8V */
-#define CONFIG_KIRKWOOD_GPIO	1
 
 /*
  * NS16550 Configuration
  */
-#define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_TCLK
@@ -66,7 +57,6 @@
  * Ethernet Driver configuration
  */
 #ifdef CONFIG_CMD_NET
-#define CONFIG_MVGBE	/* Enable kirkwood Gbe Controller Driver */
 #define CONFIG_MVGBE_PORTS	{1, 0}	/* enable a single port */
 #define CONFIG_PHY_BASE_ADR	0x01
 #endif /* CONFIG_CMD_NET */
diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h
index faeba06cd24..9b7784a0f3e 100644
--- a/include/configs/T102xRDB.h
+++ b/include/configs/T102xRDB.h
@@ -41,7 +41,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	0x30000000
 #define CONFIG_SYS_NAND_U_BOOT_START	0x30000000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	(256 << 10)
 #endif
 
 #ifdef CONFIG_SPIFLASH
@@ -116,12 +115,6 @@
 #define CONFIG_RESET_VECTOR_ADDRESS 0xfffffffc
 #endif
 
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
-#define CONFIG_SYS_CLK_FREQ	100000000
-
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
@@ -416,7 +409,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_PCIE1		/* PCIE controller 1 */
 #define CONFIG_PCIE2		/* PCIE controller 2 */
 #define CONFIG_PCIE3		/* PCIE controller 3 */
-#define CONFIG_SYS_PCI_64BIT	/* enable 64-bit PCI resources */
 
 #ifdef CONFIG_PCI
 /* controller 1, direct to uli, tgtid 3, Base address 20000 */
@@ -452,7 +444,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_HAS_FSL_DR_USB
 
 #ifdef CONFIG_HAS_FSL_DR_USB
-#define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #endif
 
diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h
index e70209231d1..7f3b1909dc1 100644
--- a/include/configs/T104xRDB.h
+++ b/include/configs/T104xRDB.h
@@ -40,7 +40,6 @@
 #endif
 #define CONFIG_SYS_NAND_U_BOOT_DST	0x30000000
 #define CONFIG_SYS_NAND_U_BOOT_START	0x30000000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	(256 << 10)
 #endif
 
 #ifdef CONFIG_SPIFLASH
@@ -85,8 +84,6 @@
 #define CONFIG_PCIE3			/* PCIE controller 3 */
 #define CONFIG_PCIE4			/* PCIE controller 4 */
 
-#define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
-
 #if defined(CONFIG_SPIFLASH)
 #elif defined(CONFIG_MTD_RAW_NAND)
 #ifdef CONFIG_NXP_ESBC
@@ -95,8 +92,6 @@
 #endif
 #endif
 
-#define CONFIG_SYS_CLK_FREQ	100000000
-
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
@@ -460,7 +455,6 @@
 
 #ifdef CONFIG_HAS_FSL_DR_USB
 #ifdef CONFIG_USB_EHCI_HCD
-#define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #endif
 #endif
@@ -499,8 +493,6 @@
 #define CONFIG_SYS_DPAA_FMAN
 #define CONFIG_SYS_DPAA_PME
 
-#define CONFIG_U_QE
-
 #define CONFIG_SYS_FDT_PAD		(0x3000 + CONFIG_SYS_QE_FMAN_FW_LENGTH)
 #endif /* CONFIG_NOBQFMAN */
 
diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h
index 7344f9392b9..aaea314e458 100644
--- a/include/configs/T208xQDS.h
+++ b/include/configs/T208xQDS.h
@@ -44,7 +44,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_START	0x00200000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	(256 << 10)
 #endif
 
 #ifdef CONFIG_SPIFLASH
@@ -94,12 +93,6 @@
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
 #endif
 
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
-#define CONFIG_SYS_CLK_FREQ	get_board_sys_clk()
-
 /*
  * Config the L3 Cache as L3 SRAM
  */
@@ -360,12 +353,6 @@ unsigned long get_board_sys_clk(void);
 #define I2C_VOL_MONITOR_BUS_V_OVF      0x1
 #define I2C_VOL_MONITOR_BUS_V_SHIFT    3
 
-#define CONFIG_VID_FLS_ENV		"t208xqds_vdd_mv"
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_VID
-#endif
-#define CONFIG_VOL_MONITOR_IR36021_SET
-#define CONFIG_VOL_MONITOR_IR36021_READ
 /* The lowest and highest voltage allowed for T208xQDS */
 #define VDD_MV_MIN			819
 #define VDD_MV_MAX			1212
@@ -420,7 +407,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_PCIE2		/* PCIE controller 2 */
 #define CONFIG_PCIE3		/* PCIE controller 3 */
 #define CONFIG_PCIE4		/* PCIE controller 4 */
-#define CONFIG_SYS_PCI_64BIT	/* enable 64-bit PCI resources */
 /* controller 1, direct to uli, tgtid 3, Base address 20000 */
 #define CONFIG_SYS_PCIE1_MEM_VIRT	0x80000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS	0xc00000000ull
@@ -517,7 +503,6 @@ unsigned long get_board_sys_clk(void);
  * USB
  */
 #ifdef CONFIG_USB_EHCI_HCD
-#define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_HAS_FSL_DR_USB
 #endif
diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h
index 979a997c73c..467f6344faf 100644
--- a/include/configs/T208xRDB.h
+++ b/include/configs/T208xRDB.h
@@ -39,7 +39,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(768 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	0x00200000
 #define CONFIG_SYS_NAND_U_BOOT_START	0x00200000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	(256 << 10)
 #endif
 
 #ifdef CONFIG_SPIFLASH
@@ -89,12 +88,6 @@
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
 #endif
 
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
-#define CONFIG_SYS_CLK_FREQ	66660000
-
 /*
  * Config the L3 Cache as L3 SRAM
  */
@@ -312,12 +305,6 @@ unsigned long get_board_sys_clk(void);
 
 #define I2C_MUX_CH_VOL_MONITOR	0xa
 
-#define CONFIG_VID_FLS_ENV		"t208xrdb_vdd_mv"
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_VID
-#endif
-#define CONFIG_VOL_MONITOR_IR36021_SET
-#define CONFIG_VOL_MONITOR_IR36021_READ
 /* The lowest and highest voltage allowed for T208xRDB */
 #define VDD_MV_MIN			819
 #define VDD_MV_MAX			1212
@@ -372,7 +359,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_PCIE2		/* PCIE controller 2 */
 #define CONFIG_PCIE3		/* PCIE controller 3 */
 #define CONFIG_PCIE4		/* PCIE controller 4 */
-#define CONFIG_SYS_PCI_64BIT	/* enable 64-bit PCI resources */
 /* controller 1, direct to uli, tgtid 3, Base address 20000 */
 #define CONFIG_SYS_PCIE1_MEM_VIRT	0x80000000
 #define CONFIG_SYS_PCIE1_MEM_PHYS	0xc00000000ull
@@ -472,7 +458,6 @@ unsigned long get_board_sys_clk(void);
  * USB
  */
 #ifdef CONFIG_USB_EHCI_HCD
-#define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_HAS_FSL_DR_USB
 #endif
diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h
index 12a11e260b5..2d632493c19 100644
--- a/include/configs/T4240RDB.h
+++ b/include/configs/T4240RDB.h
@@ -60,7 +60,6 @@
 #define CONFIG_PCIE1			/* PCIE controller 1 */
 #define CONFIG_PCIE2			/* PCIE controller 2 */
 #define CONFIG_PCIE3			/* PCIE controller 3 */
-#define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
 
 /*
  * These can be toggled for performance analysis, otherwise use default.
@@ -225,12 +224,6 @@
 	"setenv bootargs config-addr=0x60000000; "	\
 	"bootm 0x01000000 - 0x00f00000"
 
-#define CONFIG_SYS_CLK_FREQ	66666666
-
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
 /*
  * DDR Setup
  */
@@ -408,12 +401,6 @@ unsigned long get_board_sys_clk(void);
 #define I2C_VOL_MONITOR_BUS_V_OVF	0x1
 #define I2C_VOL_MONITOR_BUS_V_SHIFT	3
 
-#define CONFIG_VID_FLS_ENV		"t4240rdb_vdd_mv"
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_VID
-#endif
-#define CONFIG_VOL_MONITOR_IR36021_SET
-#define CONFIG_VOL_MONITOR_IR36021_READ
 /* The lowest and highest voltage allowed for T4240RDB */
 #define VDD_MV_MIN			819
 #define VDD_MV_MAX			1212
@@ -498,7 +485,6 @@ unsigned long get_board_sys_clk(void);
 /*
 * USB
 */
-#define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #define CONFIG_HAS_FSL_DR_USB
 
diff --git a/include/configs/adp-ae3xx.h b/include/configs/adp-ae3xx.h
index 973033d6b4d..58e85260489 100644
--- a/include/configs/adp-ae3xx.h
+++ b/include/configs/adp-ae3xx.h
@@ -17,8 +17,6 @@
 
 #define CONFIG_SKIP_TRUNOFF_WATCHDOG
 
-#define CONFIG_ARCH_MAP_SYSMEM
-
 #define CONFIG_BOOTP_SERVERIP
 
 #ifdef CONFIG_SKIP_LOWLEVEL_INIT
@@ -30,8 +28,7 @@
 /*
  * Timer
  */
-#define CONFIG_SYS_CLK_FREQ	39062500
-#define VERSION_CLOCK		CONFIG_SYS_CLK_FREQ
+#define VERSION_CLOCK		get_board_sys_clk()
 
 /*
  * Use Externel CLOCK or PCLK
diff --git a/include/configs/adp-ag101p.h b/include/configs/adp-ag101p.h
index f533ada73f4..1022764985a 100644
--- a/include/configs/adp-ag101p.h
+++ b/include/configs/adp-ag101p.h
@@ -15,8 +15,6 @@
  */
 #define CONFIG_USE_INTERRUPT
 
-#define CONFIG_ARCH_MAP_SYSMEM
-
 #define CONFIG_BOOTP_SERVERIP
 
 #ifndef CONFIG_SKIP_LOWLEVEL_INIT
@@ -32,8 +30,7 @@
 /*
  * Timer
  */
-#define CONFIG_SYS_CLK_FREQ	39062500
-#define VERSION_CLOCK		CONFIG_SYS_CLK_FREQ
+#define VERSION_CLOCK		get_board_sys_clk()
 
 /*
  * Use Externel CLOCK or PCLK
diff --git a/include/configs/alt.h b/include/configs/alt.h
index 8456a6b2c33..37b5800d6ef 100644
--- a/include/configs/alt.h
+++ b/include/configs/alt.h
@@ -34,8 +34,6 @@
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
-#define RMOBILE_XTAL_CLK	20000000u
-#define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
 
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	"bootm_size=0x10000000\0"	\
diff --git a/include/configs/ap152.h b/include/configs/ap152.h
index c3ed137475c..5bfca42156b 100644
--- a/include/configs/ap152.h
+++ b/include/configs/ap152.h
@@ -25,8 +25,6 @@
  */
 #define CONFIG_SYS_NS16550_CLK          25000000
 
-#define CONFIG_ENV_SPI_MAX_HZ           25000000
-
 /* Miscellaneous configurable options */
 
 /*
diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h
index 27007c57b3c..c2b0d6ff3e6 100644
--- a/include/configs/apalis-imx8.h
+++ b/include/configs/apalis-imx8.h
@@ -50,7 +50,7 @@
 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
 		"root=PARTUUID=${uuid} rootwait " \
 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"netargs=setenv bootargs console=${console},${baudrate} " \
 		"root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp" \
 		"\0" \
@@ -68,8 +68,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR		0x80200000
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 /* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */
 #define CONFIG_SYS_FSL_USDHC_NUM	3
 
diff --git a/include/configs/apalis-imx8x.h b/include/configs/apalis-imx8x.h
index 50dae2d8e05..402fed1bba3 100644
--- a/include/configs/apalis-imx8x.h
+++ b/include/configs/apalis-imx8x.h
@@ -77,7 +77,7 @@
 	"mmcargs=setenv bootargs ${consoleargs} " \
 		"root=PARTUUID=${uuid} rootwait " \
 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"netargs=setenv bootargs ${consoleargs} " \
 		"root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \
 		"${vidargs}\0" \
@@ -99,8 +99,6 @@
 
 /* Environment in eMMC, before config block at the end of 1st "boot sector" */
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 /* On Apalis iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 
diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h
index dfed1615b9b..13c8d8a54e5 100644
--- a/include/configs/apalis_imx6.h
+++ b/include/configs/apalis_imx6.h
@@ -45,7 +45,6 @@
 #define CONFIG_USBD_HS
 
 /* Framebuffer and LCD */
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_IMX_HDMI
diff --git a/include/configs/apple.h b/include/configs/apple.h
index b1f60431746..9cf20fc833f 100644
--- a/include/configs/apple.h
+++ b/include/configs/apple.h
@@ -5,8 +5,6 @@
 
 #define CONFIG_SYS_SDRAM_BASE	0x880000000
 
-#define CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE	CONFIG_SYS_TEXT_BASE
-
 /* Environment */
 #define ENV_DEVICE_SETTINGS \
 	"stdin=serial,usbkbd\0" \
diff --git a/include/configs/armadillo-800eva.h b/include/configs/armadillo-800eva.h
index 73f63c5a9f0..7714da40dc7 100644
--- a/include/configs/armadillo-800eva.h
+++ b/include/configs/armadillo-800eva.h
@@ -17,7 +17,7 @@
 #define CONFIG_TMU_TIMER
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
 #define CONFIG_SYS_TIMER_COUNTER	(TMU_BASE + 0xc)	/* TCNT0 */
-#define CONFIG_SYS_TIMER_RATE		(CONFIG_SYS_CLK_FREQ / 4)
+#define CONFIG_SYS_TIMER_RATE		(get_board_sys_clk() / 4)
 
 /* STACK */
 #define CONFIG_SYS_INIT_SP_ADDR		0xE8083000
@@ -72,7 +72,6 @@
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
-#define CONFIG_SYS_CLK_FREQ	50000000
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ get_board_sys_clk()
 
 #endif	/* __ARMADILLO_800EVA_H */
diff --git a/include/configs/astro_mcf5373l.h b/include/configs/astro_mcf5373l.h
index 2e7927bc371..d87ca304e26 100644
--- a/include/configs/astro_mcf5373l.h
+++ b/include/configs/astro_mcf5373l.h
@@ -58,7 +58,6 @@
 #define CONFIG_MCFTMR
 
 /* I2C */
-#define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
 
 /*
  * Defines processor clock - important for correct timings concerning serial
@@ -91,7 +90,6 @@
  */
 
 #ifndef CONFIG_MONITOR_IS_IN_RAM
-#define CONFIG_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT 3355	/* timeout in milliseconds */
 #endif
 
diff --git a/include/configs/bcm_ns3.h b/include/configs/bcm_ns3.h
index 7d6edbd65df..81b4218c888 100644
--- a/include/configs/bcm_ns3.h
+++ b/include/configs/bcm_ns3.h
@@ -44,7 +44,6 @@
 /* Access eMMC Boot_1 and Boot_2 partitions */
 
 /* enable 64-bit PCI resources */
-#define CONFIG_SYS_PCI_64BIT		1
 
 #define CONSOLE_ARGS "console_args=console=ttyS0,115200n8\0"
 #define MAX_CPUS "max_cpus=maxcpus=8\0"
diff --git a/include/configs/bcmstb.h b/include/configs/bcmstb.h
index e7f380b5155..98c815961c0 100644
--- a/include/configs/bcmstb.h
+++ b/include/configs/bcmstb.h
@@ -90,7 +90,6 @@ extern phys_addr_t prior_stage_fdt_address;
 /*
  * CONFIG_SYS_LOAD_ADDR - 1 MiB.
  */
-#define CONFIG_SYS_FDT_SAVE_ADDRESS	0x1f00000
 #define CONFIG_SYS_CBSIZE		512
 #define CONFIG_SYS_MAXARGS		32
 
@@ -104,7 +103,6 @@ extern phys_addr_t prior_stage_fdt_address;
  */
 #define V_NS16550_CLK			81000000
 
-#define CONFIG_SYS_NS16550
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	(-4)
 #define CONFIG_SYS_NS16550_CLK		V_NS16550_CLK
@@ -126,8 +124,6 @@ extern phys_addr_t prior_stage_fdt_address;
 /*
  * Flash configuration.
  */
-#define CONFIG_SPI_FLASH_STMICRO
-#define CONFIG_SPI_FLASH_MACRONIX
 
 /*
  * Filesystem configuration.
diff --git a/include/configs/blanche.h b/include/configs/blanche.h
index f048f158ed2..882b94f55a7 100644
--- a/include/configs/blanche.h
+++ b/include/configs/blanche.h
@@ -45,8 +45,6 @@
 #endif
 
 /* Board Clock */
-#define RMOBILE_XTAL_CLK	20000000u
-#define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
 
 /* ENV setting */
 
diff --git a/include/configs/broadcom_bcm963158.h b/include/configs/broadcom_bcm963158.h
index de45f74923a..5aa784d88ca 100644
--- a/include/configs/broadcom_bcm963158.h
+++ b/include/configs/broadcom_bcm963158.h
@@ -28,7 +28,6 @@
 
 #ifdef CONFIG_MTD_RAW_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_SELF_INIT
 #endif /* CONFIG_MTD_RAW_NAND */
 
 /*
diff --git a/include/configs/broadcom_bcm968360bg.h b/include/configs/broadcom_bcm968360bg.h
index 0391f062181..01bab046ddb 100644
--- a/include/configs/broadcom_bcm968360bg.h
+++ b/include/configs/broadcom_bcm968360bg.h
@@ -27,7 +27,6 @@
 
 #ifdef CONFIG_MTD_RAW_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_SELF_INIT
 #endif /* CONFIG_MTD_RAW_NAND */
 
 /*
diff --git a/include/configs/broadcom_bcm968380gerg.h b/include/configs/broadcom_bcm968380gerg.h
index 866de2527d0..c1c1b37fabd 100644
--- a/include/configs/broadcom_bcm968380gerg.h
+++ b/include/configs/broadcom_bcm968380gerg.h
@@ -8,5 +8,4 @@
 
 #ifdef CONFIG_MTD_RAW_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_SELF_INIT
 #endif /* CONFIG_MTD_RAW_NAND */
diff --git a/include/configs/broadcom_bcm968580xref.h b/include/configs/broadcom_bcm968580xref.h
index 179aa9d608c..ebfc2ecc0be 100644
--- a/include/configs/broadcom_bcm968580xref.h
+++ b/include/configs/broadcom_bcm968580xref.h
@@ -27,7 +27,6 @@
 
 #ifdef CONFIG_MTD_RAW_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_SELF_INIT
 #endif /* CONFIG_MTD_RAW_NAND */
 
 /*
diff --git a/include/configs/capricorn-common.h b/include/configs/capricorn-common.h
index e42f2b544c9..1cde5f77f22 100644
--- a/include/configs/capricorn-common.h
+++ b/include/configs/capricorn-common.h
@@ -11,15 +11,12 @@
 #include <asm/arch/imx-regs.h>
 
 #include "siemens-env-common.h"
-#include "siemens-ccp-common.h"
 
 /* SPL config */
 #ifdef CONFIG_SPL_BUILD
 
 #define CONFIG_SPL_MAX_SIZE		(124 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		(1024 * 1024)
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR		0x800
 
 #define CONFIG_SPL_STACK		0x013E000
 #define CONFIG_SPL_BSS_START_ADDR	0x00128000
@@ -35,9 +32,6 @@
 
 #define CONFIG_FACTORYSET
 
-#undef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING		GENERATE_CCP_VERSION("01", "07")
-
 #define CONFIG_REMAKE_ELF
 
 /* ENET Config */
@@ -122,7 +116,6 @@
 
 /* On CCP board, USDHC1 is for eMMC */
 #define CONFIG_MMCROOT			"/dev/mmcblk0p2"  /* eMMC */
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
 #define CONFIG_SYS_SDRAM_BASE		0x80000000
 #define PHYS_SDRAM_1			0x80000000
diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h
index 220eb819100..d5549f62cee 100644
--- a/include/configs/cgtqmx8.h
+++ b/include/configs/cgtqmx8.h
@@ -14,8 +14,6 @@
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_MAX_SIZE				(124 * 1024)
 #define CONFIG_SYS_MONITOR_LEN				(1024 * 1024)
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR		0x800
 
 #define CONFIG_SPL_STACK		0x013E000
 #define CONFIG_SPL_BSS_START_ADDR	0x00128000
@@ -33,7 +31,6 @@
 #define CONFIG_REMAKE_ELF
 
 /* Flat Device Tree Definitions */
-#define CONFIG_OF_BOARD_SETUP
 
 #define CONFIG_SYS_BOOTMAPSZ		(256 << 20)
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
@@ -82,7 +79,7 @@
 	"boot_fdt=try\0" \
 	"fdt_file=imx8qm-cgt-qmx8.dtb\0" \
 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
@@ -127,8 +124,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR		0x80200000
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
 #define CONFIG_SYS_FSL_USDHC_NUM	3
 
diff --git a/include/configs/chromebook_coral.h b/include/configs/chromebook_coral.h
index 27e60d8f586..0eeea80b32f 100644
--- a/include/configs/chromebook_coral.h
+++ b/include/configs/chromebook_coral.h
@@ -18,8 +18,6 @@
 					"stdout=vidconsole,serial\0" \
 					"stderr=vidconsole,serial\0"
 
-#define CONFIG_TPL_TEXT_BASE		0xffff8000
-
 #define CONFIG_SYS_NS16550_MEM32
 #undef CONFIG_SYS_NS16550_PORT_MAPPED
 
diff --git a/include/configs/chromebook_samus.h b/include/configs/chromebook_samus.h
index 2fe3e721993..9d5a63cabaa 100644
--- a/include/configs/chromebook_samus.h
+++ b/include/configs/chromebook_samus.h
@@ -23,6 +23,4 @@
 					"stdout=vidconsole,serial\0" \
 					"stderr=vidconsole,serial\0"
 
-#define CONFIG_TPL_TEXT_BASE		0xfffd8000
-
 #endif	/* __CONFIG_H */
diff --git a/include/configs/ci20.h b/include/configs/ci20.h
index 0a7043a80c5..17954fe3aab 100644
--- a/include/configs/ci20.h
+++ b/include/configs/ci20.h
@@ -35,7 +35,6 @@
 #define CONFIG_SYS_MAXARGS	32		/* Max number of command args */
 #define CONFIG_SYS_BARGSIZE	CONFIG_SYS_CBSIZE
 						/* Boot argument buffer size */
-#define CONFIG_VERSION_VARIABLE			/* U-BOOT version */
 
 /* Miscellaneous configuration options */
 #define CONFIG_SYS_BOOTM_LEN		(64 << 20)
@@ -50,6 +49,4 @@
 
 #define CONFIG_SPL_START_S_PATH		"arch/mips/mach-jz47xx"
 
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x1c	/* 14 KiB offset */
-
 #endif /* __CONFIG_CI20_H__ */
diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h
index 92770e89090..a5bf6ccbf40 100644
--- a/include/configs/cl-som-imx7.h
+++ b/include/configs/cl-som-imx7.h
@@ -49,7 +49,7 @@
 	"fdtaddr=0x83000000\0" \
 	"mmcdev_def="__stringify(CONFIG_SYS_MMC_DEV)"\0" \
 	"usbdev_def="__stringify(CONFIG_SYS_USB_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"usbpart=" __stringify(CONFIG_SYS_USB_IMG_LOAD_PART) "\0" \
 	"doboot=bootz ${loadaddr} - ${fdtaddr}\0" \
 	"mmc_config=mmc dev ${mmcdev}; mmc rescan\0" \
diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h
index d61d759092c..e1723c927fa 100644
--- a/include/configs/cm_fx6.h
+++ b/include/configs/cm_fx6.h
@@ -13,7 +13,6 @@
 #include "mx6_common.h"
 
 /* Machine config */
-#define CONFIG_SYS_LITTLE_ENDIAN
 
 /* MMC */
 #define CONFIG_SYS_FSL_USDHC_NUM	3
diff --git a/include/configs/cobra5272.h b/include/configs/cobra5272.h
index be62caabb5a..3e19e99c248 100644
--- a/include/configs/cobra5272.h
+++ b/include/configs/cobra5272.h
@@ -54,7 +54,6 @@
  */
 
 #if 0
-#define CONFIG_WATCHDOG
 #define CONFIG_WATCHDOG_TIMEOUT 10000	/* timeout in milliseconds */
 #endif
 
diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h
index 82926afbdf6..01182505cc8 100644
--- a/include/configs/colibri-imx8x.h
+++ b/include/configs/colibri-imx8x.h
@@ -80,7 +80,7 @@
 	"mmcargs=setenv bootargs ${consoleargs} " \
 		"root=PARTUUID=${uuid} rootwait " \
 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"netargs=setenv bootargs ${consoleargs} " \
 		"root=/dev/nfs ip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp " \
 		"${vidargs}\0" \
@@ -102,8 +102,6 @@
 
 /* Environment in eMMC, before config block at the end of 1st "boot sector" */
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 
diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h
index b103186bf46..9a6f17f5bd2 100644
--- a/include/configs/colibri_imx6.h
+++ b/include/configs/colibri_imx6.h
@@ -35,7 +35,6 @@
 #define CONFIG_USBD_HS
 
 /* Framebuffer and LCD */
-#define CONFIG_SYS_CONSOLE_OVERWRITE_ROUTINE
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_VIDEO_BMP_LOGO
 #define CONFIG_IMX_HDMI
diff --git a/include/configs/colibri_pxa270.h b/include/configs/colibri_pxa270.h
index 22eab7779b0..0be7f5a416d 100644
--- a/include/configs/colibri_pxa270.h
+++ b/include/configs/colibri_pxa270.h
@@ -12,7 +12,6 @@
 /*
  * High Level Board Configuration Options
  */
-#define	CONFIG_CPU_PXA27X		1	/* Marvell PXA270 CPU */
 /* Avoid overwriting factory configuration block */
 #define CONFIG_BOARD_SIZE_LIMIT		0x40000
 
diff --git a/include/configs/colibri_t20.h b/include/configs/colibri_t20.h
index e947b58d96c..c377187b803 100644
--- a/include/configs/colibri_t20.h
+++ b/include/configs/colibri_t20.h
@@ -19,7 +19,6 @@
 #define CONFIG_LCD_LOGO
 
 /* NAND support */
-#define CONFIG_TEGRA_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 
 #define UBOOT_UPDATE \
diff --git a/include/configs/colibri_vf.h b/include/configs/colibri_vf.h
index a7c91b9f1da..40984d661c8 100644
--- a/include/configs/colibri_vf.h
+++ b/include/configs/colibri_vf.h
@@ -14,8 +14,6 @@
 #include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
 
-#define CONFIG_SYS_FSL_CLK
-
 #ifdef CONFIG_VIDEO_FSL_DCU_FB
 #define CONFIG_VIDEO_LOGO
 #define CONFIG_VIDEO_BMP_LOGO
diff --git a/include/configs/comtrend_vr3032u.h b/include/configs/comtrend_vr3032u.h
index fc890af915a..ee29f702f8f 100644
--- a/include/configs/comtrend_vr3032u.h
+++ b/include/configs/comtrend_vr3032u.h
@@ -10,5 +10,4 @@
 
 #ifdef CONFIG_MTD_RAW_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
-#define CONFIG_SYS_NAND_SELF_INIT
 #endif /* CONFIG_MTD_RAW_NAND */
diff --git a/include/configs/condor.h b/include/configs/condor.h
index 36466f0f500..822ef7118e1 100644
--- a/include/configs/condor.h
+++ b/include/configs/condor.h
@@ -27,7 +27,6 @@
 
 /* Board Clock */
 /* XTAL_CLK : 33.33MHz */
-#define CONFIG_SYS_CLK_FREQ	33333333u
 
 /* Generic Timer Definitions (use in assembler source) */
 #define COUNTER_FREQUENCY	0xFE502A	/* 16.66MHz from CPclk */
diff --git a/include/configs/corenet_ds.h b/include/configs/corenet_ds.h
index a04e7f98b9d..f6e0b2a7ea8 100644
--- a/include/configs/corenet_ds.h
+++ b/include/configs/corenet_ds.h
@@ -47,15 +47,12 @@
 #define CONFIG_SYS_NUM_CPC		CONFIG_SYS_NUM_DDR_CTLRS
 #define CONFIG_PCIE1			/* PCIE controller 1 */
 #define CONFIG_PCIE2			/* PCIE controller 2 */
-#define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
 
 #if defined(CONFIG_SPIFLASH)
 #elif defined(CONFIG_SDCARD)
 #define CONFIG_FSL_FIXED_MMC_LOCATION
 #endif
 
-#define CONFIG_SYS_CLK_FREQ	get_board_sys_clk() /* sysclk for MPC85xx */
-
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
@@ -392,7 +389,6 @@
 #define CONFIG_HAS_FSL_MPH_USB
 
 #if defined(CONFIG_HAS_FSL_DR_USB) || defined(CONFIG_HAS_FSL_MPH_USB)
-#define CONFIG_USB_EHCI_FSL
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
 #endif
 
diff --git a/include/configs/corvus.h b/include/configs/corvus.h
index 2d615d0e11d..27284f79138 100644
--- a/include/configs/corvus.h
+++ b/include/configs/corvus.h
@@ -66,7 +66,6 @@
 #define CONFIG_SYS_NAND_MASK_CLE		(1 << 22)
 #define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
 #define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PC8
-#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
 #endif
 
 /* Ethernet */
diff --git a/include/configs/crs3xx-98dx3236.h b/include/configs/crs3xx-98dx3236.h
index 27b45a7605d..4dbc7582669 100644
--- a/include/configs/crs3xx-98dx3236.h
+++ b/include/configs/crs3xx-98dx3236.h
@@ -11,7 +11,6 @@
  */
 
 #define CONFIG_SYS_BOOTM_LEN	(64 * 1024 * 1024) /* 64 MB */
-#define CONFIG_SYS_KWD_CONFIG	$(CONFIG_BOARDDIR)/kwbimage.cfg
 
 /* Environment in SPI NOR flash */
 
diff --git a/include/configs/da850evm.h b/include/configs/da850evm.h
index bd788662947..97c9276e0e2 100644
--- a/include/configs/da850evm.h
+++ b/include/configs/da850evm.h
@@ -18,7 +18,6 @@
  * SoC Configuration
  */
 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
-#define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
 #define CONFIG_SYS_OSCIN_FREQ		24000000
 #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
@@ -136,10 +135,6 @@
 				59, 60, 61, 62, 63 }
 #define CONFIG_SYS_NAND_ECCSIZE		512
 #define CONFIG_SYS_NAND_ECCBYTES	10
-
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SYS_NAND_SELF_INIT
-#endif
 #endif
 
 /*
diff --git a/include/configs/db-xc3-24g4xg.h b/include/configs/db-xc3-24g4xg.h
index 6a4c5a7ab55..1d242bf4e65 100644
--- a/include/configs/db-xc3-24g4xg.h
+++ b/include/configs/db-xc3-24g4xg.h
@@ -6,12 +6,6 @@
 #ifndef _CONFIG_DB_XC3_24G4G_H
 #define _CONFIG_DB_XC3_24G4G_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-
-#define CONFIG_SYS_KWD_CONFIG	$(CONFIG_BOARDDIR)/kwbimage.cfg
-
 /* Environment in SPI NOR flash */
 
 /* NAND */
diff --git a/include/configs/deneb.h b/include/configs/deneb.h
index a33165c1caa..f155bb8bf50 100644
--- a/include/configs/deneb.h
+++ b/include/configs/deneb.h
@@ -9,9 +9,6 @@
 
 #include "capricorn-common.h"
 
-#undef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING		GENERATE_CCP_VERSION("01", "06")
-
 /* DDR3 board total DDR is 2 GB */
 #undef PHYS_SDRAM_1_SIZE
 #define PHYS_SDRAM_1_SIZE		0x80000000	/* 2 GB */
diff --git a/include/configs/devkit3250.h b/include/configs/devkit3250.h
index 7fbe9dff96d..1e24d05bfb8 100644
--- a/include/configs/devkit3250.h
+++ b/include/configs/devkit3250.h
@@ -28,7 +28,6 @@
 /*
  * GPIO
  */
-#define CONFIG_LPC32XX_GPIO
 
 /*
  * Ethernet
diff --git a/include/configs/devkit8000.h b/include/configs/devkit8000.h
index d813d924a68..9282f837285 100644
--- a/include/configs/devkit8000.h
+++ b/include/configs/devkit8000.h
@@ -46,15 +46,6 @@
 
 /* TWL4030 */
 
-/* Board NAND Info */
-#define CONFIG_JFFS2_NAND
-/* nand device jffs2 lives on */
-#define CONFIG_JFFS2_DEV		"nand0"
-/* start of jffs2 partition */
-#define CONFIG_JFFS2_PART_OFFSET	0x680000
-#define CONFIG_JFFS2_PART_SIZE		0xf980000	/* size of jffs2 */
-							/* partition */
-
 /* BOOTP/DHCP options */
 #define CONFIG_BOOTP_NISDOMAIN
 #define CONFIG_BOOTP_BOOTFILESIZE
diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h
index 3233bf16a5d..8b8cd4c31b4 100644
--- a/include/configs/dh_imx6.h
+++ b/include/configs/dh_imx6.h
@@ -64,13 +64,6 @@
 #endif
 #endif
 
-/* Watchdog */
-#if defined(CONFIG_SPL_BUILD)
-#undef CONFIG_WDT
-#undef CONFIG_WATCHDOG
-#define CONFIG_HW_WATCHDOG
-#endif
-
 #ifndef CONFIG_SPL_BUILD
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	"console=ttymxc0,115200\0"	\
diff --git a/include/configs/display5.h b/include/configs/display5.h
index 8633efbd6c1..38ac8692892 100644
--- a/include/configs/display5.h
+++ b/include/configs/display5.h
@@ -314,13 +314,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR \
 	(CONFIG_SYS_INIT_RAM_ADDR + CONFIG_SYS_INIT_SP_OFFSET)
 
-/* Watchdog */
-#if defined(CONFIG_SPL_BUILD)
-#undef CONFIG_WDT
-#undef CONFIG_WATCHDOG
-#define CONFIG_HW_WATCHDOG
-#endif
-
 /* ENV config */
 #ifdef CONFIG_ENV_IS_IN_SPI_FLASH
 /* The 0x120000 value corresponds to above SPI-NOR memory MAP */
diff --git a/include/configs/dns325.h b/include/configs/dns325.h
index 8e298ddfa1a..0590704000e 100644
--- a/include/configs/dns325.h
+++ b/include/configs/dns325.h
@@ -12,12 +12,6 @@
 #ifndef _CONFIG_DNS325_H
 #define _CONFIG_DNS325_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
-#define CONFIG_KW88F6281		/* SOC Name */
-
 #include "mv-common.h"
 
 /* Remove or override few declarations from mv-common.h */
@@ -32,7 +26,6 @@
 /*
  * Enable GPI0 support
  */
-#define CONFIG_KIRKWOOD_GPIO
 
 /*
  * Environment variables configurations
diff --git a/include/configs/dockstar.h b/include/configs/dockstar.h
index 8a5daf48c0f..0ad04eee1b7 100644
--- a/include/configs/dockstar.h
+++ b/include/configs/dockstar.h
@@ -12,12 +12,6 @@
 #define _CONFIG_DOCKSTAR_H
 
 /*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_FEROCEON_88FR131	1	/* CPU Core subversion */
-#define CONFIG_KW88F6281	1	/* SOC Name */
-
-/*
  * mv-common.h should be defined after CMD configs since it used them
  * to enable certain macros
  */
diff --git a/include/configs/dreamplug.h b/include/configs/dreamplug.h
index 61b1e0fc1f3..beea234d8dc 100644
--- a/include/configs/dreamplug.h
+++ b/include/configs/dreamplug.h
@@ -11,12 +11,7 @@
 #ifndef _CONFIG_DREAMPLUG_H
 #define _CONFIG_DREAMPLUG_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_SHEEVA_88SV131	1	/* CPU Core subversion */
-
-#include "mv-plug-common.h"
+#include "mv-common.h"
 
 /*
  *  Environment variables configurations
diff --git a/include/configs/ds109.h b/include/configs/ds109.h
index c57461c7e6b..8553ea0b95f 100644
--- a/include/configs/ds109.h
+++ b/include/configs/ds109.h
@@ -11,12 +11,7 @@
 #ifndef _CONFIG_DS109_H
 #define _CONFIG_DS109_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_SHEEVA_88SV131	1	/* CPU Core subversion */
-
-#include "mv-plug-common.h"
+#include "mv-common.h"
 
 /*
  *  Environment variables configurations
diff --git a/include/configs/durian.h b/include/configs/durian.h
index 1dec09b4cea..c0ea42e180a 100644
--- a/include/configs/durian.h
+++ b/include/configs/durian.h
@@ -16,7 +16,6 @@
 #define CONFIG_SYS_INIT_SP_ADDR		(0x88000000 - 0x100000)
 
 /* PCI CONFIG */
-#define CONFIG_SYS_PCI_64BIT    1
 #define CONFIG_PCI_SCAN_SHOW
 
 /* SCSI */
diff --git a/include/configs/eagle.h b/include/configs/eagle.h
index ee535042509..b8a7b5a9169 100644
--- a/include/configs/eagle.h
+++ b/include/configs/eagle.h
@@ -18,7 +18,6 @@
 
 /* Board Clock */
 /* XTAL_CLK : 33.33MHz */
-#define CONFIG_SYS_CLK_FREQ	33333333u
 
 /* Generic Timer Definitions (use in assembler source) */
 #define COUNTER_FREQUENCY	0xFE502A	/* 16.66MHz from CPclk */
diff --git a/include/configs/eb_cpu5282.h b/include/configs/eb_cpu5282.h
index 6a32bc649a5..62b62e07c56 100644
--- a/include/configs/eb_cpu5282.h
+++ b/include/configs/eb_cpu5282.h
@@ -25,8 +25,6 @@
 #define CONFIG_BOOT_RETRY_TIME	-1
 #define CONFIG_RESET_TO_RETRY
 
-#define CONFIG_HW_WATCHDOG
-
 #define STATUS_LED_ACTIVE		0
 
 /*----------------------------------------------------------------------*
@@ -187,8 +185,6 @@
  * I2C
  */
 
-#define CONFIG_SYS_IMMR			CONFIG_SYS_MBAR
-
 #ifdef CONFIG_CMD_DATE
 #define CONFIG_RTC_DS1338
 #define CONFIG_I2C_RTC_ADDR		0x68
diff --git a/include/configs/ebisu.h b/include/configs/ebisu.h
index 48d4c8a9480..081d5e9aaa6 100644
--- a/include/configs/ebisu.h
+++ b/include/configs/ebisu.h
@@ -25,7 +25,6 @@
 #define CONFIG_FLASH_SHOW_PROGRESS	45
 #define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_SYS_FLASH_BANKS_LIST	{ 0x08000000 }
-#define CONFIG_SYS_FLASH_CFI
 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT	1
 #define CONFIG_SYS_MAX_FLASH_SECT	256
diff --git a/include/configs/edminiv2.h b/include/configs/edminiv2.h
index 6b487b310cc..e20e058e0a3 100644
--- a/include/configs/edminiv2.h
+++ b/include/configs/edminiv2.h
@@ -28,9 +28,6 @@
  * High Level Configuration Options (easy to change)
  */
 
-#define CONFIG_FEROCEON		1	/* CPU Core subversion */
-#define CONFIG_88F5182		1	/* SOC Name */
-
 #include <asm/arch/orion5x.h>
 /*
  * CLKs configurations
diff --git a/include/configs/etamin.h b/include/configs/etamin.h
index 55700861711..dc83ab71908 100644
--- a/include/configs/etamin.h
+++ b/include/configs/etamin.h
@@ -84,9 +84,6 @@
 */
 
 /* nedded by compliance test in read mode */
-#if defined(CONFIG_SPL_CMT)
-#define CONFIG_SYS_DCACHE_OFF
-#endif
 
 /* Define own nand partitions */
 #define CONFIG_ENV_RANGE		(4 * CONFIG_SYS_ENV_SECT_SIZE)
diff --git a/include/configs/ethernut5.h b/include/configs/ethernut5.h
index f9a739ede0c..ccf615efa3d 100644
--- a/include/configs/ethernut5.h
+++ b/include/configs/ethernut5.h
@@ -54,9 +54,6 @@
 #endif
 
 /* JFFS2 */
-#ifdef CONFIG_CMD_JFFS2
-#define CONFIG_JFFS2_NAND
-#endif
 
 /* Ethernet */
 #define CONFIG_NET_RETRY_COUNT		20
@@ -66,7 +63,6 @@
 
 /* MMC */
 #ifdef CONFIG_CMD_MMC
-#define CONFIG_GENERIC_ATMEL_MCI
 #define CONFIG_SYS_MMC_CD_PIN		AT91_PIO_PORTC, 8
 #endif
 
diff --git a/include/configs/evb_ast2500.h b/include/configs/evb_ast2500.h
index 558d6f9452c..b109a151838 100644
--- a/include/configs/evb_ast2500.h
+++ b/include/configs/evb_ast2500.h
@@ -13,9 +13,6 @@
 
 #define CONFIG_SYS_UBOOT_BASE		CONFIG_SYS_TEXT_BASE
 
-/* Memory Info */
-#define CONFIG_SYS_LOAD_ADDR		0x83000000
-
 /* Misc */
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	""
diff --git a/include/configs/evb_ast2600.h b/include/configs/evb_ast2600.h
index 9049a9fc105..3c2155da46d 100644
--- a/include/configs/evb_ast2600.h
+++ b/include/configs/evb_ast2600.h
@@ -10,9 +10,6 @@
 
 #define CONFIG_SYS_UBOOT_BASE		CONFIG_SYS_TEXT_BASE
 
-/* Memory Info */
-#define CONFIG_SYS_LOAD_ADDR		0x83000000
-
 /* Misc */
 #define STR_HELPER(s)	#s
 #define STR(s)		STR_HELPER(s)
diff --git a/include/configs/evb_px30.h b/include/configs/evb_px30.h
index 27201fcfd7c..53781ba7ae8 100644
--- a/include/configs/evb_px30.h
+++ b/include/configs/evb_px30.h
@@ -12,6 +12,4 @@
 		"stdout=serial,vidconsole\0" \
 		"stderr=serial,vidconsole\0"
 
-#define CONFIG_SUPPORT_EMMC_RPMB
-
 #endif
diff --git a/include/configs/evb_rk3308.h b/include/configs/evb_rk3308.h
index e8893eb7de8..0273e751ce6 100644
--- a/include/configs/evb_rk3308.h
+++ b/include/configs/evb_rk3308.h
@@ -8,8 +8,6 @@
 
 #include <configs/rk3308_common.h>
 
-#define CONFIG_SUPPORT_EMMC_RPMB
-
 #define ROCKCHIP_DEVICE_SETTINGS \
 			"stdout=serial,vidconsole\0" \
 			"stderr=serial,vidconsole\0"
diff --git a/include/configs/evb_rk3568.h b/include/configs/evb_rk3568.h
index 2b255a11da2..a0f2383bf2f 100644
--- a/include/configs/evb_rk3568.h
+++ b/include/configs/evb_rk3568.h
@@ -8,8 +8,6 @@
 
 #include <configs/rk3568_common.h>
 
-#define CONFIG_SUPPORT_EMMC_RPMB
-
 #define ROCKCHIP_DEVICE_SETTINGS \
 			"stdout=serial,vidconsole\0" \
 			"stderr=serial,vidconsole\0"
diff --git a/include/configs/exynos-common.h b/include/configs/exynos-common.h
index 95aaa747e4b..eb2606905f8 100644
--- a/include/configs/exynos-common.h
+++ b/include/configs/exynos-common.h
@@ -19,8 +19,7 @@
 /* Keep L2 Cache Disabled */
 
 /* input clock of PLL: 24MHz input clock */
-#define CONFIG_SYS_CLK_FREQ		24000000
-#define COUNTER_FREQUENCY		CONFIG_SYS_CLK_FREQ
+#define COUNTER_FREQUENCY		24000000
 
 /* select serial console configuration */
 
diff --git a/include/configs/exynos78x0-common.h b/include/configs/exynos78x0-common.h
index 478a0c42b1d..8d3449f028c 100644
--- a/include/configs/exynos78x0-common.h
+++ b/include/configs/exynos78x0-common.h
@@ -67,23 +67,6 @@
 #define PHYS_SDRAM_12		(CONFIG_SYS_SDRAM_BASE + (11 * SDRAM_BANK_SIZE))
 #define PHYS_SDRAM_12_SIZE	SDRAM_BANK_SIZE
 
-#define CONFIG_DEBUG_UART_CLOCK	132710400
-
-#define CONFIG_PREBOOT \
-"echo Read pressed buttons status;" \
-"KEY_VOLUMEUP=gpa20;" \
-"KEY_HOME=gpa17;" \
-"KEY_VOLUMEDOWN=gpa21;" \
-"KEY_POWER=gpa00;" \
-"PRESSED=0;" \
-"RELEASED=1;" \
-"if gpio input $KEY_VOLUMEUP; then setenv VOLUME_UP $PRESSED; " \
-"else setenv VOLUME_UP $RELEASED; fi;" \
-"if gpio input $KEY_VOLUMEDOWN; then setenv VOLUME_DOWN $PRESSED; " \
-"else setenv VOLUME_DOWN $RELEASED; fi;" \
-"if gpio input $KEY_HOME; then setenv HOME $PRESSED; else setenv HOME $RELEASED; fi;" \
-"if gpio input $KEY_POWER; then setenv POWER $PRESSED; else setenv POWER $RELEASED; fi;"
-
 #ifndef MEM_LAYOUT_ENV_SETTINGS
 #define MEM_LAYOUT_ENV_SETTINGS \
 	"bootm_size=0x10000000\0" \
diff --git a/include/configs/falcon.h b/include/configs/falcon.h
index d783faf180e..1d6a9b9b734 100644
--- a/include/configs/falcon.h
+++ b/include/configs/falcon.h
@@ -26,7 +26,6 @@
 
 /* Board Clock */
 /* XTAL_CLK : 16.66MHz */
-#define CONFIG_SYS_CLK_FREQ	16666666u
 
 /* Generic Timer Definitions (use in assembler source) */
 #define COUNTER_FREQUENCY	0xFE502A	/* 16.66MHz from CPclk */
diff --git a/include/configs/firefly_rk3308.h b/include/configs/firefly_rk3308.h
index 3af24930431..28e3a547e33 100644
--- a/include/configs/firefly_rk3308.h
+++ b/include/configs/firefly_rk3308.h
@@ -8,8 +8,6 @@
 
 #include <configs/rk3308_common.h>
 
-#define CONFIG_SUPPORT_EMMC_RPMB
-
 #define ROCKCHIP_DEVICE_SETTINGS \
 			"stdout=serial,vidconsole\0" \
 			"stderr=serial,vidconsole\0"
diff --git a/include/configs/giedi.h b/include/configs/giedi.h
index dabb1fb1713..19a795bcf86 100644
--- a/include/configs/giedi.h
+++ b/include/configs/giedi.h
@@ -9,9 +9,6 @@
 
 #include "capricorn-common.h"
 
-#undef CONFIG_IDENT_STRING
-#define CONFIG_IDENT_STRING		GENERATE_CCP_VERSION("01", "07")
-
 /* DDR3 board total DDR is 1 GB */
 #undef PHYS_SDRAM_1_SIZE
 #define PHYS_SDRAM_1_SIZE		0x40000000	/* 1 GB */
diff --git a/include/configs/goflexhome.h b/include/configs/goflexhome.h
index 269178c9c2b..90e37d98535 100644
--- a/include/configs/goflexhome.h
+++ b/include/configs/goflexhome.h
@@ -15,12 +15,6 @@
 #define _CONFIG_GOFLEXHOME_H
 
 /*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_FEROCEON_88FR131	1	/* CPU Core subversion */
-#define CONFIG_KW88F6281	1	/* SOC Name */
-
-/*
  * Default GPIO configuration and LED status
  */
 #define GOFLEXHOME_OE_LOW               (~(0))
diff --git a/include/configs/gose.h b/include/configs/gose.h
index 60a89e00236..01657d7a669 100644
--- a/include/configs/gose.h
+++ b/include/configs/gose.h
@@ -30,8 +30,6 @@
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
-#define RMOBILE_XTAL_CLK	20000000u
-#define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
 
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	"bootm_size=0x10000000\0"
diff --git a/include/configs/grpeach.h b/include/configs/grpeach.h
index 29a446c2f5d..fb01c5614b6 100644
--- a/include/configs/grpeach.h
+++ b/include/configs/grpeach.h
@@ -9,7 +9,6 @@
 #define __GRPEACH_H
 
 /* Board Clock , P1 clock frequency (XTAL=13.33MHz) */
-#define CONFIG_SYS_CLK_FREQ	66666666
 
 /* Miscellaneous */
 #define CONFIG_SYS_PBSIZE	256
diff --git a/include/configs/guruplug.h b/include/configs/guruplug.h
index e51f3f2483f..25c5a97c69d 100644
--- a/include/configs/guruplug.h
+++ b/include/configs/guruplug.h
@@ -9,20 +9,7 @@
 #ifndef _CONFIG_GURUPLUG_H
 #define _CONFIG_GURUPLUG_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_SHEEVA_88SV131	1	/* CPU Core subversion */
-
-/*
- * Standard filesystems
- */
-
-/*
- * mv-plug-common.h should be defined after CMD configs since it used them
- * to enable certain macros
- */
-#include "mv-plug-common.h"
+#include "mv-common.h"
 
 /*
  *  Environment variables configurations
diff --git a/include/configs/harmony.h b/include/configs/harmony.h
index 5a1e72c5373..879bd5c9539 100644
--- a/include/configs/harmony.h
+++ b/include/configs/harmony.h
@@ -24,7 +24,6 @@
 #endif
 
 /* NAND support */
-#define CONFIG_TEGRA_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 
 /* Environment in NAND (which is 512M), aligned to start of last sector */
diff --git a/include/configs/ib62x0.h b/include/configs/ib62x0.h
index b03b45f837a..9783fd89ec0 100644
--- a/include/configs/ib62x0.h
+++ b/include/configs/ib62x0.h
@@ -8,12 +8,6 @@
 #ifndef _CONFIG_IB62x0_H
 #define _CONFIG_IB62x0_H
 
-/*
- * High level configuration options
- */
-#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
-#define CONFIG_KW88F6281		/* SOC Name */
-
 #include "mv-common.h"
 
 /*
@@ -50,11 +44,4 @@
 #define CONFIG_SYS_ATA_IDE1_OFFSET	MV_SATA_PORT1_OFFSET
 #endif /* CONFIG_IDE */
 
-/*
- * RTC driver configuration
- */
-#ifdef CONFIG_CMD_DATE
-#define CONFIG_RTC_MV
-#endif /* CONFIG_CMD_DATE */
-
 #endif /* _CONFIG_IB62x0_H */
diff --git a/include/configs/iconnect.h b/include/configs/iconnect.h
index 4903b92ca3a..f1aad1efde6 100644
--- a/include/configs/iconnect.h
+++ b/include/configs/iconnect.h
@@ -8,12 +8,6 @@
 #ifndef _CONFIG_ICONNECT_H
 #define _CONFIG_ICONNECT_H
 
-/*
- * High level configuration options
- */
-#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
-#define CONFIG_KW88F6281		/* SOC Name */
-
 #include "mv-common.h"
 
 /*
diff --git a/include/configs/ids8313.h b/include/configs/ids8313.h
index 49f5d68892e..206a57a6532 100644
--- a/include/configs/ids8313.h
+++ b/include/configs/ids8313.h
@@ -153,7 +153,6 @@
 /*
  * HW-Watchdog
  */
-#define CONFIG_WATCHDOG		1
 #define CONFIG_SYS_WATCHDOG_VALUE	0xFFFF
 
 /*
@@ -234,9 +233,6 @@
 #define CONFIG_TIMESTAMP
 #undef	CONFIG_SYS_LOADS_BAUD_CHANGE
 
-#define CONFIG_JFFS2_NAND
-#define CONFIG_JFFS2_DEV		"0"
-
 /* mtdparts command line support */
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/imx27lite-common.h b/include/configs/imx27lite-common.h
index c289d694e9b..dffe175f50a 100644
--- a/include/configs/imx27lite-common.h
+++ b/include/configs/imx27lite-common.h
@@ -103,7 +103,6 @@
 #define CONFIG_MXC_NAND_REGS_BASE	0xd8000000
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 #define CONFIG_SYS_NAND_BASE		0xd8000000
-#define CONFIG_JFFS2_NAND
 #define CONFIG_MXC_NAND_HWECC
 
 /*
diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h
index 4a0050b45aa..261ed900fee 100644
--- a/include/configs/imx7-cm.h
+++ b/include/configs/imx7-cm.h
@@ -32,7 +32,7 @@
 	"fdt_file=imx7-cm.dtb\0" \
 	"fdt_addr=0x83000000\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
 		"root=${mmcroot}\0" \
@@ -85,7 +85,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC1_BASE_ADDR
 #define CONFIG_SYS_FSL_USDHC_NUM		2
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 #define CONFIG_MMCROOT					"/dev/mmcblk0p2"  /* USDHC1 */
 
 /* USB Configs */
diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h
index 988058780f9..991839c0bcd 100644
--- a/include/configs/imx8mm-cl-iot-gate.h
+++ b/include/configs/imx8mm-cl-iot-gate.h
@@ -14,8 +14,6 @@
 #define CONFIG_SYS_BOOTM_LEN		(32 * SZ_1M)
 #define CONFIG_SPL_MAX_SIZE		(148 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 #define CONFIG_SYS_UBOOT_BASE	\
 	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
@@ -81,7 +79,7 @@
 	"initrd_addr=0x43800000\0"		\
 	"bootm_size=0x10000000\0" \
 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
@@ -154,8 +152,6 @@
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #define CONFIG_ETHPRIME			"FEC"
 
 #define CONFIG_FEC_XCV_TYPE		RGMII
diff --git a/include/configs/imx8mm_beacon.h b/include/configs/imx8mm_beacon.h
index 5d91de3d1e5..77f062474dd 100644
--- a/include/configs/imx8mm_beacon.h
+++ b/include/configs/imx8mm_beacon.h
@@ -11,8 +11,6 @@
 
 #define CONFIG_SPL_MAX_SIZE		(148 * 1024)
 #define CONFIG_SYS_MONITOR_LEN	SZ_512K
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 #define CONFIG_SYS_UBOOT_BASE	\
 	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
@@ -40,7 +38,7 @@
 	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
 	"initrd_addr=0x43800000\0"		\
 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate}" \
@@ -93,9 +91,6 @@
 #define PHYS_SDRAM			0x40000000
 #define PHYS_SDRAM_SIZE		0x80000000 /* 2GB DDR */
 
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END	(CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
-
 #define CONFIG_MXC_UART_BASE		UART2_BASE_ADDR
 
 /* Monitor Command Prompt */
@@ -108,7 +103,6 @@
 /* USDHC */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
 /* FEC*/
 #define CONFIG_ETHPRIME                 "FEC"
diff --git a/include/configs/imx8mm_evk.h b/include/configs/imx8mm_evk.h
index 167ca19f210..c7022ef0f7f 100644
--- a/include/configs/imx8mm_evk.h
+++ b/include/configs/imx8mm_evk.h
@@ -13,8 +13,6 @@
 #define CONFIG_SYS_BOOTM_LEN		(64 * SZ_1M)
 #define CONFIG_SPL_MAX_SIZE		(148 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 #define CONFIG_SYS_UBOOT_BASE	\
 	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
@@ -53,7 +51,7 @@
 	"fdtfile=imx8mm-evk.dtb\0" \
 	"initrd_addr=0x43800000\0"		\
 	"bootm_size=0x10000000\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 
 /* Link Definitions */
@@ -85,8 +83,6 @@
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #define CONFIG_ETHPRIME                 "FEC"
 
 #define CONFIG_FEC_XCV_TYPE             RGMII
diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h
index 4b22ba10a02..d75fcf747e4 100644
--- a/include/configs/imx8mm_icore_mx8mm.h
+++ b/include/configs/imx8mm_icore_mx8mm.h
@@ -12,8 +12,6 @@
 
 #define CONFIG_SPL_MAX_SIZE		(148 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 #define CONFIG_SYS_UBOOT_BASE \
 	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
@@ -30,9 +28,6 @@
 # define CONFIG_SPL_ABORT_ON_RAW_IMAGE
 #endif /* CONFIG_SPL_BUILD */
 
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END	(CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
-
 #ifndef CONFIG_SPL_BUILD
 #define BOOT_TARGET_DEVICES(func) \
 	func(MMC, mmc, 2) \
@@ -71,10 +66,6 @@
 #define PHYS_SDRAM_SIZE			SZ_2G /* 2GB DDR */
 #define CONFIG_SYS_BOOTM_LEN		SZ_256M
 
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END	\
-	(CONFIG_SYS_MEMTEST_START + (PHYS_SDRAM_SIZE >> 1))
-
 /* UART */
 #define CONFIG_MXC_UART_BASE		UART2_BASE_ADDR
 
@@ -88,6 +79,5 @@
 /* USDHC */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
 #endif /* __IMX8MM_ICORE_MX8MM_H */
diff --git a/include/configs/imx8mm_venice.h b/include/configs/imx8mm_venice.h
index f8d41425c6f..7ab11cc8fb1 100644
--- a/include/configs/imx8mm_venice.h
+++ b/include/configs/imx8mm_venice.h
@@ -11,8 +11,6 @@
 
 #define CONFIG_SPL_MAX_SIZE		(148 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 #define CONFIG_SYS_UBOOT_BASE	\
 	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
@@ -105,7 +103,6 @@
 /* USDHC */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
 /* FEC */
 #define CONFIG_ETHPRIME                 "eth0"
diff --git a/include/configs/imx8mn_beacon.h b/include/configs/imx8mn_beacon.h
index 438a3820c74..28435359739 100644
--- a/include/configs/imx8mn_beacon.h
+++ b/include/configs/imx8mn_beacon.h
@@ -11,9 +11,6 @@
 
 #define CONFIG_SPL_MAX_SIZE		(148 * SZ_1K)
 #define CONFIG_SYS_MONITOR_LEN	SZ_512K
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
 #define CONFIG_SYS_UBOOT_BASE	\
 	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
@@ -46,7 +43,7 @@
 	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
 	"initrd_addr=0x43800000\0"		\
 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"finduuid=part uuid mmc ${mmcdev}:2 uuid\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console} " \
@@ -124,7 +121,6 @@
 /* USDHC */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
 /* ENET Config */
 #if defined(CONFIG_FEC_MXC)
diff --git a/include/configs/imx8mn_evk.h b/include/configs/imx8mn_evk.h
index ab893214921..142fc3e4fff 100644
--- a/include/configs/imx8mn_evk.h
+++ b/include/configs/imx8mn_evk.h
@@ -14,8 +14,6 @@
 
 #define CONFIG_SPL_MAX_SIZE		(148 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 #define CONFIG_SYS_UBOOT_BASE	\
 	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
@@ -52,7 +50,7 @@
 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
 	"initrd_addr=0x43800000\0"		\
 	"bootm_size=0x10000000\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 
 /* Link Definitions */
@@ -84,6 +82,4 @@
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #endif
diff --git a/include/configs/imx8mp_evk.h b/include/configs/imx8mp_evk.h
index 30cce1a49e2..b810a558adf 100644
--- a/include/configs/imx8mp_evk.h
+++ b/include/configs/imx8mp_evk.h
@@ -14,8 +14,6 @@
 
 #define CONFIG_SPL_MAX_SIZE		(152 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 #define CONFIG_SYS_UBOOT_BASE	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
 #ifdef CONFIG_SPL_BUILD
@@ -67,7 +65,7 @@
 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
 	"initrd_addr=0x43800000\0"		\
 	"bootm_size=0x10000000\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 
 /* Link Definitions */
@@ -100,6 +98,4 @@
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #endif
diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h
index 7206c08a8c9..b099004937d 100644
--- a/include/configs/imx8mq_cm.h
+++ b/include/configs/imx8mq_cm.h
@@ -14,8 +14,6 @@
 
 #define CONFIG_SPL_MAX_SIZE		(124 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_STACK		0x187FF0
@@ -61,7 +59,7 @@
 	"fdt_file=imx8mq-cm.dtb\0" \
 	"initrd_addr=0x43800000\0"		\
 	"bootm_size=0x10000000\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 
 /* Link Definitions */
@@ -91,6 +89,4 @@
 #define CONFIG_SYS_FSL_USDHC_NUM		2
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #endif
diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h
index 49a9526d96e..6e1d387e2b1 100644
--- a/include/configs/imx8mq_evk.h
+++ b/include/configs/imx8mq_evk.h
@@ -14,8 +14,6 @@
 
 #define CONFIG_SPL_MAX_SIZE		(124 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 
 #ifdef CONFIG_SPL_BUILD
 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
@@ -72,7 +70,7 @@
 	"fdt_file=imx8mq-evk.dtb\0" \
 	"initrd_addr=0x43800000\0"		\
 	"bootm_size=0x10000000\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 
 /* Link Definitions */
@@ -102,10 +100,4 @@
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
-#define CONFIG_MXC_GPIO
-
-#define CONFIG_OF_SYSTEM_SETUP
-
 #endif
diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h
index 9f55b039f20..1668ca8acf3 100644
--- a/include/configs/imx8mq_phanbell.h
+++ b/include/configs/imx8mq_phanbell.h
@@ -11,8 +11,6 @@
 
 #define CONFIG_SPL_MAX_SIZE		(172 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 
 #ifdef CONFIG_SPL_BUILD
 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
@@ -62,7 +60,7 @@
 	"initrd_addr=0x43800000\0"		\
 	"initrd_high=0xffffffffffffffff\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
@@ -118,10 +116,6 @@
 #define PHYS_SDRAM                      0x40000000
 #define PHYS_SDRAM_SIZE			0x40000000 /* 1GB DDR */
 
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					(PHYS_SDRAM_SIZE >> 1))
-
 #define CONFIG_MXC_UART_BASE		UART1_BASE_ADDR
 
 /* Monitor Command Prompt */
@@ -134,10 +128,4 @@
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
-#define CONFIG_MXC_GPIO
-
-#define CONFIG_OF_SYSTEM_SETUP
-
 #endif
diff --git a/include/configs/imx8qm_mek.h b/include/configs/imx8qm_mek.h
index 6b8d9405f46..884d741789f 100644
--- a/include/configs/imx8qm_mek.h
+++ b/include/configs/imx8qm_mek.h
@@ -15,8 +15,6 @@
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_MAX_SIZE				(124 * 1024)
 #define CONFIG_SYS_MONITOR_LEN				(1024 * 1024)
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR		0x800
 
 #define CONFIG_SPL_STACK		0x013E000
 #define CONFIG_SPL_BSS_START_ADDR	0x00128000
@@ -33,9 +31,6 @@
 
 #define CONFIG_REMAKE_ELF
 
-/* Flat Device Tree Definitions */
-#define CONFIG_OF_BOARD_SETUP
-
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 #define USDHC1_BASE_ADDR                0x5B010000
 #define USDHC2_BASE_ADDR                0x5B020000
@@ -60,7 +55,7 @@
 	"initrd_addr=0x83800000\0"		\
 	"initrd_high=0xffffffffffffffff\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 " \
@@ -127,8 +122,6 @@
 
 /* Default environment is in SD */
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
 #define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h
index 3dea00ca280..1a553510f6d 100644
--- a/include/configs/imx8qm_rom7720.h
+++ b/include/configs/imx8qm_rom7720.h
@@ -64,7 +64,7 @@
 	"fdt_file=imx8qm-rom7720-a1.dtb\0" \
 	"initrd_addr=0x83800000\0"		\
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot} earlycon\0 " \
@@ -109,17 +109,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR		0x80200000
 
-/* Default environment is in SD */
-
-#ifdef CONFIG_QSPI_BOOT
-#define CONFIG_ENV_SPI_BUS	CONFIG_SF_DEFAULT_BUS
-#define CONFIG_ENV_SPI_CS	CONFIG_SF_DEFAULT_CS
-#define CONFIG_ENV_SPI_MODE	CONFIG_SF_DEFAULT_MODE
-#define CONFIG_ENV_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED
-#endif
-
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board,
  * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND,
  * USDHC2 is for SD, USDHC3 is for SD on base board
diff --git a/include/configs/imx8qxp_mek.h b/include/configs/imx8qxp_mek.h
index 76ef1241340..3900ef1b500 100644
--- a/include/configs/imx8qxp_mek.h
+++ b/include/configs/imx8qxp_mek.h
@@ -13,8 +13,6 @@
 #ifdef CONFIG_SPL_BUILD
 #define CONFIG_SPL_MAX_SIZE				(124 * 1024)
 #define CONFIG_SYS_MONITOR_LEN				(1024 * 1024)
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR		0x800
 
 #define CONFIG_SPL_STACK		0x013E000
 #define CONFIG_SPL_BSS_START_ADDR	0x00128000
@@ -31,9 +29,6 @@
 
 #define CONFIG_REMAKE_ELF
 
-/* Flat Device Tree Definitions */
-#define CONFIG_OF_BOARD_SETUP
-
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 #define USDHC1_BASE_ADDR                0x5B010000
 #define USDHC2_BASE_ADDR                0x5B020000
@@ -58,7 +53,7 @@
 	"initrd_addr=0x83800000\0"		\
 	"initrd_high=0xffffffffffffffff\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} root=${mmcroot}\0 " \
@@ -125,8 +120,6 @@
 
 /* Default environment is in SD */
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 /* On LPDDR4 board, USDHC1 is for eMMC, USDHC2 is for SD on CPU board */
 #define CONFIG_MMCROOT			"/dev/mmcblk1p2"  /* USDHC2 */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
diff --git a/include/configs/imx8ulp_evk.h b/include/configs/imx8ulp_evk.h
index 501f465b9e7..6b25b485dec 100644
--- a/include/configs/imx8ulp_evk.h
+++ b/include/configs/imx8ulp_evk.h
@@ -12,9 +12,6 @@
 #define CONFIG_SYS_BOOTM_LEN		(SZ_64M)
 #define CONFIG_SPL_MAX_SIZE		(148 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
-#define CONFIG_SYS_MMCSD_FS_BOOT_PARTITION	1
 #define CONFIG_SYS_UBOOT_BASE	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
 #ifdef CONFIG_SPL_BUILD
@@ -64,7 +61,7 @@
 	"fdtfile=imx8ulp-evk.dtb\0" \
 	"initrd_addr=0x83800000\0"		\
 	"bootm_size=0x10000000\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 
 /* Link Definitions */
diff --git a/include/configs/imxrt1020-evk.h b/include/configs/imxrt1020-evk.h
index 64c0f5eaf0b..79feab389e3 100644
--- a/include/configs/imxrt1020-evk.h
+++ b/include/configs/imxrt1020-evk.h
@@ -11,7 +11,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR		0x20240000
 
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC135		1
 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE	1
 
 #define PHYS_SDRAM			0x80000000
diff --git a/include/configs/imxrt1050-evk.h b/include/configs/imxrt1050-evk.h
index 99d25c1e6ef..241e87234fd 100644
--- a/include/configs/imxrt1050-evk.h
+++ b/include/configs/imxrt1050-evk.h
@@ -11,7 +11,6 @@
 
 #define CONFIG_SYS_INIT_SP_ADDR		0x20280000
 
-#define CONFIG_SYS_FSL_ERRATUM_ESDHC135		1
 #define ESDHCI_QUIRK_BROKEN_TIMEOUT_VALUE	1
 
 #define PHYS_SDRAM			0x80000000
diff --git a/include/configs/km/km-mpc8309.h b/include/configs/km/km-mpc8309.h
index 869bd9b30a9..98204bd3c69 100644
--- a/include/configs/km/km-mpc8309.h
+++ b/include/configs/km/km-mpc8309.h
@@ -5,12 +5,6 @@
 
 #define CONFIG_KM_DEF_ARCH	"arch=ppc_82xx\0"
 
-/*
- * System Clock Setup
- */
-#define CONFIG_SYS_CLK_FREQ		66000000
-#define CONFIG_83XX_PCICLK		66000000
-
 /* QE microcode/firmware address */
 /* between the u-boot partition and env */
 
diff --git a/include/configs/km/km-mpc832x.h b/include/configs/km/km-mpc832x.h
index de6e7daf066..888bb2981f7 100644
--- a/include/configs/km/km-mpc832x.h
+++ b/include/configs/km/km-mpc832x.h
@@ -1,15 +1,4 @@
 /*
- * High Level Configuration Options
- */
-#define CONFIG_KM8321	/* Keymile PBEC8321 board specific */
-
-/*
- * System Clock Setup
- */
-#define CONFIG_SYS_CLK_FREQ		66000000
-#define CONFIG_83XX_PCICLK		66000000
-
-/*
  * System IO Config
  */
 #define CONFIG_SYS_SICRL	SICRL_IRQ_CKS
@@ -69,6 +58,3 @@
 
 #define CONFIG_SYS_KMBEC_FPGA_BASE	0xE8000000
 #define CONFIG_SYS_KMBEC_FPGA_SIZE	128
-
-/* EEprom support */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	1
diff --git a/include/configs/km/km_arm.h b/include/configs/km/km_arm.h
index cca624ea3e1..a485c3ac6d1 100644
--- a/include/configs/km/km_arm.h
+++ b/include/configs/km/km_arm.h
@@ -19,12 +19,6 @@
 #ifndef _CONFIG_KM_ARM_H
 #define _CONFIG_KM_ARM_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
-#define CONFIG_KW88F6281		/* SOC Name */
-
 #define CONFIG_NAND_ECC_BCH
 
 /* include common defines/options for all Keymile boards */
@@ -74,7 +68,6 @@
 #undef CONFIG_I2C_MVTWSI
 #define CONFIG_SYS_I2C_INIT_BOARD
 
-#define	CONFIG_KIRKWOOD_GPIO		/* Enable GPIO Support */
 #define CONFIG_SYS_NUM_I2C_BUSES	6
 #define CONFIG_SYS_I2C_MAX_HOPS		1
 #define CONFIG_SYS_I2C_BUSES	{	{0, {I2C_NULL_HOP} }, \
diff --git a/include/configs/km/pg-wcom-ls102xa.h b/include/configs/km/pg-wcom-ls102xa.h
index 743d09e9c4d..ba0e4dd5c6a 100644
--- a/include/configs/km/pg-wcom-ls102xa.h
+++ b/include/configs/km/pg-wcom-ls102xa.h
@@ -6,8 +6,6 @@
 #ifndef __CONFIG_PG_WCOM_LS102XA_H
 #define __CONFIG_PG_WCOM_LS102XA_H
 
-#define CONFIG_SYS_FSL_CLK
-
 /* include common defines/options for all Keymile boards */
 #include "keymile-common.h"
 
@@ -18,8 +16,6 @@
 					  CONFIG_KM_PHRAM + \
 					  CONFIG_KM_RESERVED_PRAM) >> 10)
 
-#define CONFIG_SYS_CLK_FREQ		66666666
-
 #define PHYS_SDRAM			0x80000000
 #define PHYS_SDRAM_SIZE			(1u * 1024 * 1024 * 1024)
 
@@ -40,7 +36,6 @@
  * IFC Definitions
  */
 /* NOR Flash Definitions */
-#define CONFIG_FSL_IFC
 #define CONFIG_SYS_FLASH_BASE		0x60000000
 #define CONFIG_SYS_FLASH_BASE_PHYS	CONFIG_SYS_FLASH_BASE
 
diff --git a/include/configs/km_kirkwood.h b/include/configs/km_kirkwood.h
index 82c2a129223..e58a69501b3 100644
--- a/include/configs/km_kirkwood.h
+++ b/include/configs/km_kirkwood.h
@@ -34,8 +34,6 @@
 /* KM_KIRKWOOD_128M16 */
 #elif defined(CONFIG_KM_KIRKWOOD_128M16)
 #define CONFIG_HOSTNAME			"km_kirkwood_128m16"
-#undef CONFIG_SYS_KWD_CONFIG
-#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
 #define CONFIG_KM_DISABLE_PCIE
 
 /* KM_NUSA */
@@ -43,21 +41,14 @@
 
 #define CONFIG_HOSTNAME			"kmnusa"
 
-#undef CONFIG_SYS_KWD_CONFIG
-#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
-
 /* KMCOGE5UN */
 #elif defined(CONFIG_KM_COGE5UN)
-#undef	CONFIG_SYS_KWD_CONFIG
-#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_256M8_1.cfg
 #define CONFIG_HOSTNAME			"kmcoge5un"
 #define CONFIG_KM_DISABLE_PCIE
 
 /* KM_SUSE2 */
 #elif defined(CONFIG_KM_SUSE2)
 #define CONFIG_HOSTNAME			"kmsuse2"
-#undef CONFIG_SYS_KWD_CONFIG
-#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage_128M16_1.cfg
 #define CONFIG_KM_UBI_PART_BOOT_OPTS		",2048"
 #define CONFIG_SYS_NAND_NO_SUBPAGE_WRITE
 #else
diff --git a/include/configs/kmcent2.h b/include/configs/kmcent2.h
index 4dbd53c3877..98e572397b5 100644
--- a/include/configs/kmcent2.h
+++ b/include/configs/kmcent2.h
@@ -141,14 +141,11 @@
 #define CONFIG_SYS_FSL_CPC		/* Corenet Platform Cache */
 #define CONFIG_SYS_NUM_CPC		CONFIG_SYS_NUM_DDR_CTLRS
 #define CONFIG_PCIE1			/* PCIE controller 1 */
-#define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
 
 /* Environment in parallel NOR-Flash */
 #define CONFIG_ENV_TOTAL_SIZE		0x040000
 #define ENV_DEL_ADDR		0xebf00000	/*direct for newenv*/
 
-#define CONFIG_SYS_CLK_FREQ	66666666
-
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
@@ -362,7 +359,6 @@
  * Retain non-DM serial port for debug purposes.
  */
 #if !defined(CONFIG_DM_SERIAL)
-#define CONFIG_CONS_INDEX	1
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE	1
 #define CONFIG_SYS_NS16550_CLK		(get_bus_freq(0) / 2)
diff --git a/include/configs/kmcoge5ne.h b/include/configs/kmcoge5ne.h
index 60fe4ae3839..8f4685c271c 100644
--- a/include/configs/kmcoge5ne.h
+++ b/include/configs/kmcoge5ne.h
@@ -24,12 +24,6 @@
 #include "km/km-mpc83xx.h"
 #include "km/km-mpc8360.h"
 
-/*
- * System Clock Setup
- */
-#define CONFIG_SYS_CLK_FREQ		66000000
-#define CONFIG_83XX_PCICLK		66000000
-
 /**
  * KMCOGE5NE has 512 MB RAM
  */
diff --git a/include/configs/koelsch.h b/include/configs/koelsch.h
index 65a38c5757b..eca8998a515 100644
--- a/include/configs/koelsch.h
+++ b/include/configs/koelsch.h
@@ -30,8 +30,6 @@
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
-#define RMOBILE_XTAL_CLK	20000000u
-#define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
 
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	"bootm_size=0x10000000\0"
diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h
index 34304f91028..2bac0008e25 100644
--- a/include/configs/kontron-sl-mx6ul.h
+++ b/include/configs/kontron-sl-mx6ul.h
@@ -59,7 +59,6 @@
 #ifdef CONFIG_FSL_USDHC
 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC1_BASE_ADDR
 #define CONFIG_SYS_FSL_USDHC_NUM	2
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 #endif
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h
index 4152851ba41..448749a7f81 100644
--- a/include/configs/kontron_sl28.h
+++ b/include/configs/kontron_sl28.h
@@ -30,10 +30,6 @@
 /* early stack pointer */
 #define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_FSL_OCRAM_BASE + 0xeff0)
 
-/* memtest command */
-#define CONFIG_SYS_MEMTEST_START        0x80000000
-#define CONFIG_SYS_MEMTEST_END          0x9fffffff
-
 /* SMP */
 #define CPU_RELEASE_ADDR		secondary_boot_addr
 
@@ -46,8 +42,7 @@
 /* serial port */
 #define CONFIG_SYS_NS16550_CLK          (get_bus_freq(0) / 2)
 
-#define CONFIG_SYS_CLK_FREQ		100000000
-#define COUNTER_FREQUENCY_REAL		(CONFIG_SYS_CLK_FREQ / 4)
+#define COUNTER_FREQUENCY_REAL		(get_board_sys_clk() / 4)
 
 /* ethernet */
 #define CONFIG_SYS_RX_ETH_BUFFER	8
diff --git a/include/configs/kp_imx53.h b/include/configs/kp_imx53.h
index 8ac381c5d78..0983d40ec41 100644
--- a/include/configs/kp_imx53.h
+++ b/include/configs/kp_imx53.h
@@ -10,8 +10,6 @@
 #include <asm/arch/imx-regs.h>
 #include <linux/sizes.h>
 
-#define CONFIG_SYS_FSL_CLK
-
 /* USB Configs */
 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
 #define CONFIG_MXC_USB_FLAGS	0
diff --git a/include/configs/kzm9g.h b/include/configs/kzm9g.h
index c3f690c7d70..1eb6dafe203 100644
--- a/include/configs/kzm9g.h
+++ b/include/configs/kzm9g.h
@@ -68,9 +68,8 @@
 
 /* Clock */
 #define CONFIG_GLOBAL_TIMER
-#define CONFIG_SYS_CLK_FREQ	(48000000)
 #define CONFIG_SYS_CPU_CLK	(1196000000)
-#define CONFIG_SH_SCIF_CLK_FREQ CONFIG_SYS_CLK_FREQ
+#define CONFIG_SH_SCIF_CLK_FREQ get_board_sys_clk()
 #define TMU_CLK_DIVIDER		(4)	/* 4 (default), 16, 64, 256 or 1024 */
 
 #define CONFIG_NFS_TIMEOUT 10000UL
diff --git a/include/configs/lacie_kw.h b/include/configs/lacie_kw.h
index 6180563ab76..046f1888cb1 100644
--- a/include/configs/lacie_kw.h
+++ b/include/configs/lacie_kw.h
@@ -6,35 +6,6 @@
 #ifndef _CONFIG_LACIE_KW_H
 #define _CONFIG_LACIE_KW_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
-/* SoC name */
-#if defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2)
-#define CONFIG_KW88F6192
-#else
-#define CONFIG_KW88F6281
-#endif
-
-/*
- * SDRAM configuration
- */
-
-/*
- * Different SDRAM configuration and size for some of the boards derived
- * from the Network Space v2
- */
-#if defined(CONFIG_INETSPACE_V2)
-#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-is2.cfg
-#elif defined(CONFIG_NETSPACE_LITE_V2) || defined(CONFIG_NETSPACE_MINI_V2)
-#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-ns2l.cfg
-#endif
-
-/*
- * mv-common.h should be defined after CMD configs since it used them
- * to enable certain macros
- */
 #include "mv-common.h"
 
 /* Remove or override few declarations from mv-common.h */
@@ -70,7 +41,6 @@
 /*
  * Enable GPI0 support
  */
-#define CONFIG_KIRKWOOD_GPIO
 
 /*
  * Enable I2C support
diff --git a/include/configs/lager.h b/include/configs/lager.h
index c5001e3ec75..4c291aa89be 100644
--- a/include/configs/lager.h
+++ b/include/configs/lager.h
@@ -31,8 +31,6 @@
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
-#define RMOBILE_XTAL_CLK	20000000u
-#define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
 
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	"bootm_size=0x10000000\0"
diff --git a/include/configs/legoev3.h b/include/configs/legoev3.h
index 0e4d134dbdc..b912db11d00 100644
--- a/include/configs/legoev3.h
+++ b/include/configs/legoev3.h
@@ -18,7 +18,6 @@
  * SoC Configuration
  */
 #define CONFIG_SYS_EXCEPTION_VECTORS_HIGH
-#define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
 #define CONFIG_SYS_OSCIN_FREQ		24000000
 #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h
index 2d051e59447..3a8dd475b26 100644
--- a/include/configs/liteboard.h
+++ b/include/configs/liteboard.h
@@ -23,8 +23,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR	USDHC1_BASE_ADDR
 #endif
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"script=boot.scr\0" \
 	"image=zImage\0" \
@@ -36,7 +34,7 @@
 	"boot_fdt=try\0" \
 	"ip_dyn=yes\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
diff --git a/include/configs/ls1012a2g5rdb.h b/include/configs/ls1012a2g5rdb.h
index ffc23debb85..bda4283ef5a 100644
--- a/include/configs/ls1012a2g5rdb.h
+++ b/include/configs/ls1012a2g5rdb.h
@@ -14,8 +14,6 @@
 #define CONFIG_SYS_SDRAM_SIZE		0x40000000
 
 /* SATA */
-#define CONFIG_LIBATA
-#define CONFIG_SCSI_AHCI
 #define CONFIG_SCSI_AHCI_PLAT
 
 #define CONFIG_SYS_SATA				AHCI_BASE_ADDR
diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h
index 88986f973f7..5d561009c56 100644
--- a/include/configs/ls1012a_common.h
+++ b/include/configs/ls1012a_common.h
@@ -10,8 +10,6 @@
 #include <asm/arch/stream_id_lsch2.h>
 #include <linux/sizes.h>
 
-#define CONFIG_SYS_CLK_FREQ		125000000
-
 #ifdef CONFIG_TFABOOT
 #define CONFIG_SYS_INIT_SP_ADDR                CONFIG_SYS_TEXT_BASE
 #else
@@ -45,11 +43,6 @@
 /* I2C */
 
 /* GPIO */
-#ifdef CONFIG_DM_GPIO
-#ifndef CONFIG_MPC8XXX_GPIO
-#define CONFIG_MPC8XXX_GPIO
-#endif
-#endif
 
 #define CONFIG_SYS_NS16550_SERIAL
 #define CONFIG_SYS_NS16550_REG_SIZE     1
diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h
index 391f0f3be72..c61865ccd4e 100644
--- a/include/configs/ls1012afrwy.h
+++ b/include/configs/ls1012afrwy.h
@@ -8,9 +8,6 @@
 
 #include "ls1012a_common.h"
 
-#undef CONFIG_SYS_BOARD
-#define CONFIG_SYS_BOARD "ls1012afrwy"
-
 /* Board Rev*/
 #define BOARD_REV_A_B			0x0
 #define BOARD_REV_C			0x00080000
diff --git a/include/configs/ls1012aqds.h b/include/configs/ls1012aqds.h
index 98c04339af1..cbcb3f72a56 100644
--- a/include/configs/ls1012aqds.h
+++ b/include/configs/ls1012aqds.h
@@ -75,19 +75,16 @@
 				DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \
 				DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \
 				DSPI_CTAR_DT(0))
-#define CONFIG_SPI_FLASH_SST /* cs1 */
 
 #define CONFIG_SYS_DSPI_CTAR2	(DSPI_CTAR_TRSZ(7) | DSPI_CTAR_PCSSCK_1CLK |\
 				DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \
 				DSPI_CTAR_CSSCK(0) | DSPI_CTAR_ASC(0) | \
 				DSPI_CTAR_DT(0))
-#define CONFIG_SPI_FLASH_STMICRO /* cs2 */
 
 #define CONFIG_SYS_DSPI_CTAR3	(DSPI_CTAR_TRSZ(7) | DSPI_CTAR_PCSSCK_1CLK |\
 				DSPI_CTAR_PASC(0) | DSPI_CTAR_PDT(0) | \
 				DSPI_CTAR_CSSCK(2) | DSPI_CTAR_ASC(0) | \
 				DSPI_CTAR_DT(0))
-#define CONFIG_SPI_FLASH_EON /* cs3 */
 
 #define CONFIG_PCIE1		/* PCIE controller 1 */
 
diff --git a/include/configs/ls1021aiot.h b/include/configs/ls1021aiot.h
index 222caa161d0..7b4044fba72 100644
--- a/include/configs/ls1021aiot.h
+++ b/include/configs/ls1021aiot.h
@@ -9,13 +9,9 @@
 
 #define CONFIG_ARMV7_SECURE_BASE OCRAM_BASE_S_ADDR
 
-#define CONFIG_SYS_FSL_CLK
-
 #define CONFIG_SYS_INIT_RAM_ADDR	OCRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE	OCRAM_SIZE
 
-#define CONFIG_SYS_CLK_FREQ		100000000
-
 /*
  * DDR: 800 MHz ( 1600 MT/s data rate )
  */
@@ -48,8 +44,6 @@
 #define SDRAM_CFG_BI			0x00000001
 
 #ifdef CONFIG_SD_BOOT
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0xe8
-
 #define CONFIG_SPL_MAX_SIZE		0x1a000
 #define CONFIG_SPL_STACK		0x1001d000
 #define CONFIG_SPL_PAD_TO		0x1c000
@@ -100,9 +94,6 @@
 		CONFIG_SYS_SCSI_MAX_LUN)
 
 /* SPI */
-#if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_SPI_FLASH_SPANSION
-#endif
 
 /*
  * eTSEC
@@ -174,9 +165,6 @@
 #define CONFIG_SYS_MONITOR_BASE CONFIG_SYS_TEXT_BASE
 #endif
 
-#define CONFIG_OF_BOARD_SETUP
-#define CONFIG_OF_STDOUT_VIA_ALIAS
-
 #include <asm/fsl_secure_boot.h>
 
 #endif
diff --git a/include/configs/ls1021aqds.h b/include/configs/ls1021aqds.h
index 27b97ffd2fb..7ef42a6d8c3 100644
--- a/include/configs/ls1021aqds.h
+++ b/include/configs/ls1021aqds.h
@@ -9,22 +9,13 @@
 
 #define CONFIG_ARMV7_SECURE_BASE	OCRAM_BASE_S_ADDR
 
-#define CONFIG_SYS_FSL_CLK
-
 #define CONFIG_DEEP_SLEEP
 
 #define CONFIG_SYS_INIT_RAM_ADDR	OCRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE	OCRAM_SIZE
 
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_SYS_CLK_FREQ		100000000
 #define CONFIG_QIXIS_I2C_ACCESS
-#else
-#define CONFIG_SYS_CLK_FREQ		get_board_sys_clk()
 #endif
 
 #ifdef CONFIG_SD_BOOT
@@ -76,7 +67,6 @@ unsigned long get_board_sys_clk(void);
  * IFC Definitions
  */
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_FSL_IFC
 #define CONFIG_SYS_FLASH_BASE		0x60000000
 #define CONFIG_SYS_FLASH_BASE_PHYS	CONFIG_SYS_FLASH_BASE
 
@@ -298,11 +288,6 @@ unsigned long get_board_sys_clk(void);
  */
 
 /* GPIO */
-#ifdef CONFIG_DM_GPIO
-#ifndef CONFIG_MPC8XXX_GPIO
-#define CONFIG_MPC8XXX_GPIO
-#endif
-#endif
 
 /* EEPROM */
 #define CONFIG_SYS_I2C_EEPROM_NXID
diff --git a/include/configs/ls1021atsn.h b/include/configs/ls1021atsn.h
index f70b6e94c07..5f6c2a00370 100644
--- a/include/configs/ls1021atsn.h
+++ b/include/configs/ls1021atsn.h
@@ -8,8 +8,6 @@
 
 #define CONFIG_ARMV7_SECURE_BASE	OCRAM_BASE_S_ADDR
 
-#define CONFIG_SYS_FSL_CLK
-
 #define CONFIG_DEEP_SLEEP
 
 #define CONFIG_SYS_INIT_RAM_ADDR	OCRAM_BASE_ADDR
@@ -18,8 +16,6 @@
 /* XHCI Support - enabled by default */
 #define CONFIG_USB_MAX_CONTROLLER_COUNT	1
 
-#define CONFIG_SYS_CLK_FREQ		100000000
-
 #define DDR_SDRAM_CFG			0x470c0008
 #define DDR_CS0_BNDS			0x008000bf
 #define DDR_CS0_CONFIG			0x80014302
@@ -75,7 +71,6 @@
 #endif /* ifdef CONFIG_U_BOOT_HDR_SIZE */
 #endif
 
-#define CONFIG_NR_DRAM_BANKS		1
 #define PHYS_SDRAM			0x80000000
 #define PHYS_SDRAM_SIZE			(1u * 1024 * 1024 * 1024)
 
diff --git a/include/configs/ls1021atwr.h b/include/configs/ls1021atwr.h
index b7c2cd7add8..75fab4328a0 100644
--- a/include/configs/ls1021atwr.h
+++ b/include/configs/ls1021atwr.h
@@ -9,15 +9,11 @@
 
 #define CONFIG_ARMV7_SECURE_BASE	OCRAM_BASE_S_ADDR
 
-#define CONFIG_SYS_FSL_CLK
-
 #define CONFIG_DEEP_SLEEP
 
 #define CONFIG_SYS_INIT_RAM_ADDR	OCRAM_BASE_ADDR
 #define CONFIG_SYS_INIT_RAM_SIZE	OCRAM_SIZE
 
-#define CONFIG_SYS_CLK_FREQ		100000000
-
 #define DDR_SDRAM_CFG			0x470c0008
 #define DDR_CS0_BNDS			0x008000bf
 #define DDR_CS0_CONFIG			0x80014302
@@ -89,7 +85,6 @@
  * IFC Definitions
  */
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
-#define CONFIG_FSL_IFC
 #define CONFIG_SYS_FLASH_BASE		0x60000000
 #define CONFIG_SYS_FLASH_BASE_PHYS	CONFIG_SYS_FLASH_BASE
 
@@ -191,11 +186,6 @@
  */
 
 /* GPIO */
-#ifdef CONFIG_DM_GPIO
-#ifndef CONFIG_MPC8XXX_GPIO
-#define CONFIG_MPC8XXX_GPIO
-#endif
-#endif
 
 /* EEPROM */
 #define CONFIG_SYS_I2C_EEPROM_NXID
diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h
index b4431806725..f47bc739843 100644
--- a/include/configs/ls1028a_common.h
+++ b/include/configs/ls1028a_common.h
@@ -7,7 +7,6 @@
 #define __L1028A_COMMON_H
 
 #define CONFIG_REMAKE_ELF
-#define CONFIG_MP
 
 #include <asm/arch/stream_id_lsch3.h>
 #include <asm/arch/config.h>
@@ -32,11 +31,6 @@
 #define COUNTER_FREQUENCY		25000000	/* 25MHz */
 
 /* GPIO */
-#ifdef CONFIG_DM_GPIO
-#ifndef CONFIG_MPC8XXX_GPIO
-#define CONFIG_MPC8XXX_GPIO
-#endif
-#endif
 
 /* I2C */
 
diff --git a/include/configs/ls1028aqds.h b/include/configs/ls1028aqds.h
index fe20363e690..8e3bd7790fe 100644
--- a/include/configs/ls1028aqds.h
+++ b/include/configs/ls1028aqds.h
@@ -8,8 +8,7 @@
 
 #include "ls1028a_common.h"
 
-#define CONFIG_SYS_CLK_FREQ		100000000
-#define COUNTER_FREQUENCY_REAL		(CONFIG_SYS_CLK_FREQ / 4)
+#define COUNTER_FREQUENCY_REAL		(get_board_sys_clk() / 4)
 
 /* DDR */
 #define CONFIG_DIMM_SLOTS_PER_CTLR		2
diff --git a/include/configs/ls1028ardb.h b/include/configs/ls1028ardb.h
index 348db1e2f8c..5ce9ebbae93 100644
--- a/include/configs/ls1028ardb.h
+++ b/include/configs/ls1028ardb.h
@@ -8,8 +8,7 @@
 
 #include "ls1028a_common.h"
 
-#define CONFIG_SYS_CLK_FREQ		100000000
-#define COUNTER_FREQUENCY_REAL		(CONFIG_SYS_CLK_FREQ / 4)
+#define COUNTER_FREQUENCY_REAL		(get_board_sys_clk() / 4)
 
 #define CONFIG_SYS_RTC_BUS_NUM         0
 
diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h
index b3f91176d65..3b4f822ecff 100644
--- a/include/configs/ls1043a_common.h
+++ b/include/configs/ls1043a_common.h
@@ -112,17 +112,11 @@
 #endif
 
 /* GPIO */
-#ifdef CONFIG_DM_GPIO
-#ifndef CONFIG_MPC8XXX_GPIO
-#define CONFIG_MPC8XXX_GPIO
-#endif
-#endif
 
 /* IFC */
 #ifndef SPL_NO_IFC
 #if defined(CONFIG_TFABOOT) || \
 	(!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI))
-#define CONFIG_FSL_IFC
 /*
  * CONFIG_SYS_FLASH_BASE has the final address (core view)
  * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
@@ -154,13 +148,6 @@
 #endif
 
 /*  DSPI  */
-#ifndef SPL_NO_DSPI
-#ifdef CONFIG_FSL_DSPI
-#define CONFIG_SPI_FLASH_STMICRO	/* cs0 */
-#define CONFIG_SPI_FLASH_SST		/* cs1 */
-#define CONFIG_SPI_FLASH_EON		/* cs2 */
-#endif
-#endif
 
 /* FMan ucode */
 #ifndef SPL_NO_FMAN
diff --git a/include/configs/ls1043aqds.h b/include/configs/ls1043aqds.h
index ee5660571e5..80eff7b1a90 100644
--- a/include/configs/ls1043aqds.h
+++ b/include/configs/ls1043aqds.h
@@ -8,12 +8,6 @@
 
 #include "ls1043a_common.h"
 
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
-#define CONFIG_SYS_CLK_FREQ		get_board_sys_clk()
-
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
@@ -330,12 +324,6 @@ unsigned long get_board_sys_clk(void);
 #define I2C_VOL_MONITOR_BUS_V_OVF      0x1
 #define I2C_VOL_MONITOR_BUS_V_SHIFT    3
 
-#define CONFIG_VID_FLS_ENV		"ls1043aqds_vdd_mv"
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_VID
-#endif
-#define CONFIG_VOL_MONITOR_IR36021_SET
-#define CONFIG_VOL_MONITOR_INA220
 /* The lowest and highest voltage allowed for LS1043AQDS */
 #define VDD_MV_MIN			819
 #define VDD_MV_MAX			1212
diff --git a/include/configs/ls1043ardb.h b/include/configs/ls1043ardb.h
index 0d071c4ab74..7b6d19374e7 100644
--- a/include/configs/ls1043ardb.h
+++ b/include/configs/ls1043ardb.h
@@ -8,8 +8,6 @@
 
 #include "ls1043a_common.h"
 
-#define CONFIG_SYS_CLK_FREQ		100000000
-
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h
index 515f4209bb9..d07d27d1f5c 100644
--- a/include/configs/ls1046a_common.h
+++ b/include/configs/ls1046a_common.h
@@ -110,11 +110,6 @@
 #endif
 
 /* GPIO */
-#ifdef CONFIG_DM_GPIO
-#ifndef CONFIG_MPC8XXX_GPIO
-#define CONFIG_MPC8XXX_GPIO
-#endif
-#endif
 
 /* I2C */
 
diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h
index fa37c681aba..14ad84a1ef4 100644
--- a/include/configs/ls1046afrwy.h
+++ b/include/configs/ls1046afrwy.h
@@ -8,8 +8,6 @@
 
 #include "ls1046a_common.h"
 
-#define CONFIG_SYS_CLK_FREQ		100000000
-
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR     1
@@ -17,8 +15,6 @@
 
 #define CONFIG_SYS_UBOOT_BASE		0x40100000
 
-/* IFC */
-#define CONFIG_FSL_IFC
 /*
  * NAND Flash Definitions
  */
diff --git a/include/configs/ls1046aqds.h b/include/configs/ls1046aqds.h
index 3a502bc3468..97bf4182be1 100644
--- a/include/configs/ls1046aqds.h
+++ b/include/configs/ls1046aqds.h
@@ -8,12 +8,6 @@
 
 #include "ls1046a_common.h"
 
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
-#define CONFIG_SYS_CLK_FREQ		get_board_sys_clk()
-
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
@@ -43,7 +37,6 @@ unsigned long get_board_sys_clk(void);
 
 /* IFC */
 #if !defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
-#define	CONFIG_FSL_IFC
 /*
  * CONFIG_SYS_FLASH_BASE has the final address (core view)
  * CONFIG_SYS_FLASH_BASE_PHYS has the final address (IFC view)
@@ -339,12 +332,6 @@ unsigned long get_board_sys_clk(void);
 #define I2C_VOL_MONITOR_BUS_V_OVF      0x1
 #define I2C_VOL_MONITOR_BUS_V_SHIFT    3
 
-#define CONFIG_VID_FLS_ENV		"ls1046aqds_vdd_mv"
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_VID
-#endif
-#define CONFIG_VOL_MONITOR_IR36021_SET
-#define CONFIG_VOL_MONITOR_INA220
 /* The lowest and highest voltage allowed for LS1046AQDS */
 #define VDD_MV_MIN			819
 #define VDD_MV_MAX			1212
diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h
index c27eb733382..8ed1dceb234 100644
--- a/include/configs/ls1046ardb.h
+++ b/include/configs/ls1046ardb.h
@@ -9,8 +9,6 @@
 
 #include "ls1046a_common.h"
 
-#define CONFIG_SYS_CLK_FREQ		100000000
-
 #define CONFIG_LAYERSCAPE_NS_ACCESS
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
@@ -27,14 +25,6 @@
 #define CONFIG_SYS_SPL_ARGS_ADDR	0x90000000
 #endif
 
-#ifndef SPL_NO_IFC
-/* IFC */
-#define CONFIG_FSL_IFC
-/*
- * NAND Flash Definitions
- */
-#endif
-
 #define CONFIG_SYS_NAND_BASE		0x7e800000
 #define CONFIG_SYS_NAND_BASE_PHYS	CONFIG_SYS_NAND_BASE
 
diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h
index 140362cf4fc..2e52108c23e 100644
--- a/include/configs/ls1088a_common.h
+++ b/include/configs/ls1088a_common.h
@@ -49,11 +49,6 @@
 #define CPU_RELEASE_ADDR		secondary_boot_addr
 
 /* GPIO */
-#ifdef CONFIG_DM_GPIO
-#ifndef CONFIG_MPC8XXX_GPIO
-#define CONFIG_MPC8XXX_GPIO
-#endif
-#endif
 
 /* I2C */
 
@@ -63,11 +58,6 @@
 #define CONFIG_SYS_NS16550_REG_SIZE     1
 #define CONFIG_SYS_NS16550_CLK          (get_bus_freq(0) / 2)
 
-#if !defined(SPL_NO_IFC) || defined(CONFIG_TARGET_LS1088AQDS)
-/* IFC */
-#define CONFIG_FSL_IFC
-#endif
-
 /*
  * During booting, IFC is mapped at the region of 0x30000000.
  * But this region is limited to 256MB. To accommodate NOR, promjet
diff --git a/include/configs/ls1088aqds.h b/include/configs/ls1088aqds.h
index d001acfd68a..5912fe95ccf 100644
--- a/include/configs/ls1088aqds.h
+++ b/include/configs/ls1088aqds.h
@@ -8,22 +8,14 @@
 
 #include "ls1088a_common.h"
 
-
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
 #if defined(CONFIG_QSPI_BOOT) || defined(CONFIG_SD_BOOT_QSPI)
 #define CONFIG_QIXIS_I2C_ACCESS
 #define SYS_NO_FLASH
-
-#define CONFIG_SYS_CLK_FREQ		100000000
 #else
 #define CONFIG_QIXIS_I2C_ACCESS
-#define CONFIG_SYS_CLK_FREQ		get_board_sys_clk()
 #endif
 
-#define COUNTER_FREQUENCY_REAL		(CONFIG_SYS_CLK_FREQ/4)
+#define COUNTER_FREQUENCY_REAL		(get_board_sys_clk()/4)
 #define COUNTER_FREQUENCY		25000000	/* 25MHz */
 
 #define CONFIG_DIMM_SLOTS_PER_CTLR	1
@@ -298,16 +290,10 @@ unsigned long get_board_sys_clk(void);
 #define I2C_VOL_MONITOR_BUS_V_SHIFT    3
 #define I2C_SVDD_MONITOR_ADDR           0x4F
 
-#define CONFIG_VID_FLS_ENV              "ls1088aqds_vdd_mv"
-#define CONFIG_VID
-
 /* The lowest and highest voltage allowed for LS1088AQDS */
 #define VDD_MV_MIN			819
 #define VDD_MV_MAX			1212
 
-#define CONFIG_VOL_MONITOR_LTC3882_SET
-#define CONFIG_VOL_MONITOR_LTC3882_READ
-
 #define PWM_CHANNEL0                    0x0
 
 /*
@@ -321,9 +307,6 @@ unsigned long get_board_sys_clk(void);
 #define CONFIG_SYS_EEPROM_BUS_NUM		0
 
 #ifdef CONFIG_FSL_DSPI
-#define CONFIG_SPI_FLASH_STMICRO
-#define CONFIG_SPI_FLASH_SST
-#define CONFIG_SPI_FLASH_EON
 #if !defined(CONFIG_TFABOOT) && \
 	!defined(CONFIG_QSPI_BOOT) && !defined(CONFIG_SD_BOOT_QSPI)
 #endif
diff --git a/include/configs/ls1088ardb.h b/include/configs/ls1088ardb.h
index 93510429085..400b8adb24c 100644
--- a/include/configs/ls1088ardb.h
+++ b/include/configs/ls1088ardb.h
@@ -16,7 +16,6 @@
 #define SYS_NO_FLASH
 #endif
 
-#define CONFIG_SYS_CLK_FREQ		100000000
 #define COUNTER_FREQUENCY_REAL		25000000	/* 25MHz */
 #define COUNTER_FREQUENCY		25000000	/* 25MHz */
 
@@ -197,16 +196,10 @@
 #define I2C_VOL_MONITOR_BUS_V_SHIFT    3
 #define I2C_SVDD_MONITOR_ADDR		0x4F
 
-#define CONFIG_VID_FLS_ENV              "ls1088ardb_vdd_mv"
-#define CONFIG_VID
-
 /* The lowest and highest voltage allowed for LS1088ARDB */
 #define VDD_MV_MIN			819
 #define VDD_MV_MAX			1212
 
-#define CONFIG_VOL_MONITOR_LTC3882_SET
-#define CONFIG_VOL_MONITOR_LTC3882_READ
-
 #define PWM_CHANNEL0                    0x0
 
 /*
diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h
index 0ca03e0702c..eea6ce53db5 100644
--- a/include/configs/ls2080a_common.h
+++ b/include/configs/ls2080a_common.h
@@ -61,11 +61,6 @@
 #define COUNTER_FREQUENCY		25000000	/* 25MHz */
 
 /* GPIO */
-#ifdef CONFIG_DM_GPIO
-#ifndef CONFIG_MPC8XXX_GPIO
-#define CONFIG_MPC8XXX_GPIO
-#endif
-#endif
 
 /* I2C */
 
@@ -74,9 +69,6 @@
 #define CONFIG_SYS_NS16550_REG_SIZE     1
 #define CONFIG_SYS_NS16550_CLK          (get_serial_clock())
 
-/* IFC */
-#define CONFIG_FSL_IFC
-
 /*
  * During booting, IFC is mapped at the region of 0x30000000.
  * But this region is limited to 256MB. To accommodate NOR, promjet
diff --git a/include/configs/ls2080aqds.h b/include/configs/ls2080aqds.h
index e67dee0f00b..b0a05dd8071 100644
--- a/include/configs/ls2080aqds.h
+++ b/include/configs/ls2080aqds.h
@@ -9,18 +9,13 @@
 
 #include "ls2080a_common.h"
 
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
 #ifdef CONFIG_FSL_QSPI
 #define CONFIG_QIXIS_I2C_ACCESS
 #define CONFIG_SYS_I2C_IFDR_DIV		0x7e
 #endif
 
 #define CONFIG_SYS_I2C_FPGA_ADDR	0x66
-#define CONFIG_SYS_CLK_FREQ		get_board_sys_clk()
-#define COUNTER_FREQUENCY_REAL		(CONFIG_SYS_CLK_FREQ/4)
+#define COUNTER_FREQUENCY_REAL		(get_board_sys_clk()/4)
 
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
 #define SPD_EEPROM_ADDRESS1	0x51
@@ -256,15 +251,7 @@ unsigned long get_board_sys_clk(void);
 #define I2C_MUX_CH_DEFAULT      0x8
 
 /* SPI */
-#ifdef CONFIG_FSL_DSPI
-#define CONFIG_SPI_FLASH_STMICRO
-#define CONFIG_SPI_FLASH_SST
-#define CONFIG_SPI_FLASH_EON
-#endif
 
-#ifdef CONFIG_FSL_QSPI
-#define CONFIG_SPI_FLASH_SPANSION
-#endif
 /*
  * Verify QSPI when boot from NAND, QIXIS brdcfg9 need configure.
  * If boot from on-board NAND, ISO1 = 1, ISO2 = 0, IBOOT = 0
@@ -285,9 +272,7 @@ unsigned long get_board_sys_clk(void);
  */
 #define RTC
 #define CONFIG_RTC_DS3231               1
-#define CONFIG_RTC_ENABLE_32KHZ_OUTPUT
 #define CONFIG_SYS_I2C_RTC_ADDR         0x68
-#define CONFIG_RTC_ENABLE_32KHZ_OUTPUT
 
 /* EEPROM */
 #define CONFIG_SYS_I2C_EEPROM_NXID
diff --git a/include/configs/ls2080ardb.h b/include/configs/ls2080ardb.h
index 674d27ff8c5..a54387e16ca 100644
--- a/include/configs/ls2080ardb.h
+++ b/include/configs/ls2080ardb.h
@@ -17,13 +17,7 @@
 
 #define I2C_MUX_CH_VOL_MONITOR		0xa
 #define I2C_VOL_MONITOR_ADDR		0x38
-#define CONFIG_VOL_MONITOR_IR36021_READ
-#define CONFIG_VOL_MONITOR_IR36021_SET
 
-#define CONFIG_VID_FLS_ENV		"ls2080ardb_vdd_mv"
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_VID
-#endif
 /* step the IR regulator in 5mV increments */
 #define IR_VDD_STEP_DOWN		5
 #define IR_VDD_STEP_UP			5
@@ -31,12 +25,7 @@
 #define VDD_MV_MIN			819
 #define VDD_MV_MAX			1212
 
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
-#define CONFIG_SYS_CLK_FREQ		get_board_sys_clk()
-#define COUNTER_FREQUENCY_REAL		(CONFIG_SYS_CLK_FREQ/4)
+#define COUNTER_FREQUENCY_REAL		(get_board_sys_clk()/4)
 
 #define CONFIG_MEM_INIT_VALUE		0xdeadbeef
 #define SPD_EEPROM_ADDRESS1	0x51
@@ -258,9 +247,6 @@ unsigned long get_board_sys_clk(void);
 #define I2C_MUX_CH_DEFAULT      0x8
 
 /* SPI */
-#if defined(CONFIG_FSL_DSPI)
-#define CONFIG_SPI_FLASH_STMICRO
-#endif
 
 /*
  * RTC configuration
diff --git a/include/configs/lsxl.h b/include/configs/lsxl.h
index 7294a3c20a5..afa0206fb93 100644
--- a/include/configs/lsxl.h
+++ b/include/configs/lsxl.h
@@ -8,23 +8,8 @@
 #define _CONFIG_LSXL_H
 
 /*
- * Version number information
- */
-#if defined(CONFIG_LSCHLV2)
-#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lschl.cfg
-#elif defined(CONFIG_LSXHL)
-#define CONFIG_SYS_KWD_CONFIG $(CONFIG_BOARDDIR)/kwbimage-lsxhl.cfg
-#else
-#error "unknown board"
-#endif
-
-/*
  * General configuration options
  */
-#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
-#define CONFIG_KW88F6281		/* SOC Name */
-
-#define CONFIG_KIRKWOOD_GPIO
 
 #include "mv-common.h"
 
diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h
index 0710004776e..e285109cbba 100644
--- a/include/configs/lx2160a_common.h
+++ b/include/configs/lx2160a_common.h
@@ -11,7 +11,6 @@
 #include <asm/arch/soc.h>
 
 #define CONFIG_REMAKE_ELF
-#define CONFIG_FSL_TZPC_BP147
 #define CONFIG_FSL_MEMAC
 
 #define CONFIG_SYS_INIT_SP_ADDR		CONFIG_SYS_TEXT_BASE
@@ -105,7 +104,6 @@
 
 /* PCI */
 #ifdef CONFIG_PCI
-#define CONFIG_SYS_PCI_64BIT
 #define CONFIG_PCI_SCAN_SHOW
 #endif
 
@@ -128,19 +126,7 @@
 #endif
 #endif
 
-/* GPIO */
-#ifdef CONFIG_DM_GPIO
-#ifndef CONFIG_MPC8XXX_GPIO
-#define CONFIG_MPC8XXX_GPIO
-#endif
-#endif
-
-#ifndef __ASSEMBLY__
-unsigned long get_board_sys_clk(void);
-#endif
-
-#define CONFIG_SYS_CLK_FREQ		get_board_sys_clk()
-#define COUNTER_FREQUENCY_REAL		(CONFIG_SYS_CLK_FREQ / 4)
+#define COUNTER_FREQUENCY_REAL		(get_board_sys_clk() / 4)
 
 #define CONFIG_HWCONFIG
 #define HWCONFIG_BUFFER_SIZE		128
diff --git a/include/configs/lx2160aqds.h b/include/configs/lx2160aqds.h
index a04bbb6e6eb..a07ebeb7233 100644
--- a/include/configs/lx2160aqds.h
+++ b/include/configs/lx2160aqds.h
@@ -8,12 +8,6 @@
 
 #include "lx2160a_common.h"
 
-/* VID */
-#define CONFIG_VID_FLS_ENV		"lx2160aqds_vdd_mv"
-#define CONFIG_VID
-#define CONFIG_VOL_MONITOR_LTC3882_SET
-#define CONFIG_VOL_MONITOR_LTC3882_READ
-
 /* RTC */
 #define CONFIG_SYS_RTC_BUS_NUM		0
 
diff --git a/include/configs/lx2160ardb.h b/include/configs/lx2160ardb.h
index 4fd3e548309..a8a9f8259eb 100644
--- a/include/configs/lx2160ardb.h
+++ b/include/configs/lx2160ardb.h
@@ -8,12 +8,6 @@
 
 #include "lx2160a_common.h"
 
-/* VID */
-#define CONFIG_VID_FLS_ENV		"lx2160ardb_vdd_mv"
-#define CONFIG_VID
-#define CONFIG_VOL_MONITOR_LTC3882_SET
-#define CONFIG_VOL_MONITOR_LTC3882_READ
-
 /* RTC */
 #define CONFIG_SYS_RTC_BUS_NUM		4
 
diff --git a/include/configs/lx2162aqds.h b/include/configs/lx2162aqds.h
index 67c469c0090..c2fa5794c8a 100644
--- a/include/configs/lx2162aqds.h
+++ b/include/configs/lx2162aqds.h
@@ -12,12 +12,6 @@
 #undef CONFIG_USB_MAX_CONTROLLER_COUNT
 #define CONFIG_USB_MAX_CONTROLLER_COUNT 1
 
-/* Voltage monitor on channel 2*/
-#define CONFIG_VID_FLS_ENV		"lx2162aqds_vdd_mv"
-#define CONFIG_VID
-#define CONFIG_VOL_MONITOR_LTC3882_SET
-#define CONFIG_VOL_MONITOR_LTC3882_READ
-
 /* RTC */
 #define CONFIG_SYS_RTC_BUS_NUM		0
 
diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h
index 2844553067c..c2345e8224e 100644
--- a/include/configs/m53menlo.h
+++ b/include/configs/m53menlo.h
@@ -11,8 +11,6 @@
 
 #include <asm/arch/imx-regs.h>
 
-#define CONFIG_SYS_FSL_CLK
-
 #define CONFIG_TIMESTAMP		/* Print image info with timestamp */
 
 /*
@@ -204,9 +202,4 @@
 		"fi ; "							\
 		"fi\0"
 
-#if defined(CONFIG_SPL_BUILD)
-#undef CONFIG_WATCHDOG
-#define CONFIG_HW_WATCHDOG
-#endif
-
 #endif	/* __M53MENLO_CONFIG_H__ */
diff --git a/include/configs/medcom-wide.h b/include/configs/medcom-wide.h
index 84b998e23af..b35ba59aba9 100644
--- a/include/configs/medcom-wide.h
+++ b/include/configs/medcom-wide.h
@@ -19,7 +19,6 @@
 #define CONFIG_SYS_NS16550_COM1		NV_PA_APB_UARTD_BASE
 
 /* NAND support */
-#define CONFIG_TEGRA_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 
 /* Environment in NAND, aligned to start of last sector */
diff --git a/include/configs/meson64.h b/include/configs/meson64.h
index cb202d55556..44f2967fc6b 100644
--- a/include/configs/meson64.h
+++ b/include/configs/meson64.h
@@ -29,7 +29,6 @@
 #define STDIN_CFG "serial"
 #endif
 
-#define CONFIG_CPU_ARMV8
 #define CONFIG_REMAKE_ELF
 #define CONFIG_SYS_MAXARGS		32
 #define CONFIG_SYS_CBSIZE		1024
diff --git a/include/configs/mt8183.h b/include/configs/mt8183.h
index ebd2b326ade..2b4e976aa1f 100644
--- a/include/configs/mt8183.h
+++ b/include/configs/mt8183.h
@@ -11,7 +11,6 @@
 
 #include <linux/sizes.h>
 
-#define CONFIG_CPU_ARMV8
 #define COUNTER_FREQUENCY		13000000
 
 #define CONFIG_SYS_NS16550_SERIAL
diff --git a/include/configs/mt8512.h b/include/configs/mt8512.h
index 8882a5a4097..9c443db9f52 100644
--- a/include/configs/mt8512.h
+++ b/include/configs/mt8512.h
@@ -13,8 +13,6 @@
 
 #define CONFIG_SYS_NONCACHED_MEMORY		SZ_1M
 
-#define CONFIG_CPU_ARMV8
-
 #define COUNTER_FREQUENCY			13000000
 
 #define CONFIG_SYS_BOOTM_LEN			SZ_64M
diff --git a/include/configs/mt8516.h b/include/configs/mt8516.h
index 12840b883de..47132c1db1d 100644
--- a/include/configs/mt8516.h
+++ b/include/configs/mt8516.h
@@ -11,7 +11,6 @@
 
 #include <linux/sizes.h>
 
-#define CONFIG_CPU_ARMV8
 #define COUNTER_FREQUENCY		13000000
 
 #define CONFIG_SYS_NS16550_SERIAL
diff --git a/include/configs/mt8518.h b/include/configs/mt8518.h
index 593c6a11d74..49ee926b0c9 100644
--- a/include/configs/mt8518.h
+++ b/include/configs/mt8518.h
@@ -13,8 +13,6 @@
 
 #define CONFIG_SYS_NONCACHED_MEMORY		SZ_1M
 
-#define CONFIG_CPU_ARMV8
-
 #define COUNTER_FREQUENCY			13000000
 
 /* DRAM definition */
diff --git a/include/configs/mv-plug-common.h b/include/configs/mv-plug-common.h
deleted file mode 100644
index d38d9872c00..00000000000
--- a/include/configs/mv-plug-common.h
+++ /dev/null
@@ -1,21 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * (C) Copyright 2009-2015
- * Marvell Semiconductor <www.marvell.com>
- */
-
-#ifndef _CONFIG_MARVELL_PLUG_H
-#define _CONFIG_MARVELL_PLUG_H
-
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_KW88F6281	1	/* SOC Name */
-
-/*
- * mv-common.h should be defined after CMD configs since it used them
- * to enable certain macros
- */
-#include "mv-common.h"
-
-#endif /* _CONFIG_MARVELL_PLUG_H */
diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h
index f1a87faaece..fd42d2b0f50 100644
--- a/include/configs/mx51evk.h
+++ b/include/configs/mx51evk.h
@@ -12,8 +12,6 @@
 
  /* High Level Configuration Options */
 
-#define CONFIG_SYS_FSL_CLK
-
 #include <asm/arch/imx-regs.h>
 
 /*
diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h
index f03e4252976..16c2241fd57 100644
--- a/include/configs/mx53cx9020.h
+++ b/include/configs/mx53cx9020.h
@@ -14,8 +14,6 @@
 
 #include <asm/arch/imx-regs.h>
 
-#define CONFIG_SYS_FSL_CLK
-
 #define CONFIG_MXC_UART_BASE UART2_BASE
 
 #define CONFIG_FPGA_COUNT 1
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 92c75f5ee8e..a972410db74 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -11,8 +11,6 @@
 
 #include <asm/arch/imx-regs.h>
 
-#define CONFIG_SYS_FSL_CLK
-
 #define CONFIG_MXC_UART_BASE	UART1_BASE
 
 /* MMC Configs */
diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index 80487e099bc..8f8dfe94ca9 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -11,8 +11,6 @@
 
 #include <asm/arch/imx-regs.h>
 
-#define CONFIG_SYS_FSL_CLK
-
 /* USB Configs */
 #define CONFIG_MXC_USB_PORT	1
 #define CONFIG_MXC_USB_PORTSC	(PORT_PTS_UTMI | PORT_PTS_PTW)
diff --git a/include/configs/mx6_common.h b/include/configs/mx6_common.h
index 0ae8305c592..5ff931ee3bc 100644
--- a/include/configs/mx6_common.h
+++ b/include/configs/mx6_common.h
@@ -27,8 +27,6 @@
 #include <asm/arch/imx-regs.h>
 #include <asm/mach-imx/gpio.h>
 
-#define CONFIG_SYS_FSL_CLK
-
 /* Miscellaneous configurable options */
 #define CONFIG_SYS_CBSIZE	512
 #define CONFIG_SYS_MAXARGS	32
diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h
index 5d74964124d..90b053bc205 100644
--- a/include/configs/mx6ul_14x14_evk.h
+++ b/include/configs/mx6ul_14x14_evk.h
@@ -33,8 +33,6 @@
 
 #endif
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"script=boot.scr\0" \
 	"image=zImage\0" \
@@ -48,7 +46,7 @@
 	"splashimage=" __stringify(CONFIG_SYS_LOAD_ADDR) "\0" \
 	"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h
index 5e857bd7057..6bcca11c4c2 100644
--- a/include/configs/mx6ullevk.h
+++ b/include/configs/mx6ullevk.h
@@ -30,8 +30,6 @@
 #endif
 #endif
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"script=boot.scr\0" \
 	"image=zImage\0" \
@@ -44,7 +42,7 @@
 	"ip_dyn=yes\0" \
 	"videomode=video=ctfb:x:480,y:272,depth:24,pclk:108695,le:8,ri:4,up:2,lo:4,hs:41,vs:10,sync:0,vmode:0\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
@@ -124,8 +122,6 @@
 
 #define CONFIG_IOMUX_LPSR
 
-#define CONFIG_SOFT_SPI
-
 #ifdef CONFIG_CMD_NET
 #define CONFIG_FEC_ENET_DEV		1
 #if (CONFIG_FEC_ENET_DEV == 0)
diff --git a/include/configs/mx7_common.h b/include/configs/mx7_common.h
index ffe8c758dd2..2e976df6985 100644
--- a/include/configs/mx7_common.h
+++ b/include/configs/mx7_common.h
@@ -17,7 +17,6 @@
 #define CONFIG_MXC_GPT_HCLK
 #define CONFIG_SC_TIMER_CLK 8000000 /* 8Mhz */
 #define COUNTER_FREQUENCY CONFIG_SC_TIMER_CLK
-#define CONFIG_SYS_FSL_CLK
 
 #define CONFIG_SYS_BOOTM_LEN	0x1000000
 
diff --git a/include/configs/mx7dsabresd.h b/include/configs/mx7dsabresd.h
index f11e2e3f807..a853e2b880f 100644
--- a/include/configs/mx7dsabresd.h
+++ b/include/configs/mx7dsabresd.h
@@ -17,8 +17,6 @@
 /* MMC Config*/
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #ifdef CONFIG_IMX_BOOTAUX
 /* Set to QSPI1 A flash at default */
 #define CONFIG_SYS_AUXCORE_BOOTDATA 0x60000000
diff --git a/include/configs/mx7ulp_com.h b/include/configs/mx7ulp_com.h
index 58d48edac43..8c4d94215b9 100644
--- a/include/configs/mx7ulp_com.h
+++ b/include/configs/mx7ulp_com.h
@@ -25,7 +25,6 @@
  */
 #define CONFIG_BOARD_SIZE_LIMIT		785408
 #define CONFIG_MMCROOT			"/dev/mmcblk0p2"
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
 /* Using ULP WDOG for reset */
 #define WDOG_BASE_ADDR			WDG1_RBASE
@@ -48,7 +47,7 @@
 	"fdt_file=imx7ulp-com.dtb\0" \
 	"fdt_addr=0x63000000\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
 		"root=${mmcroot}\0" \
diff --git a/include/configs/mx7ulp_evk.h b/include/configs/mx7ulp_evk.h
index 7540a7732be..8f2cbc643ee 100644
--- a/include/configs/mx7ulp_evk.h
+++ b/include/configs/mx7ulp_evk.h
@@ -15,7 +15,6 @@
 #define CONFIG_SYS_BOOTM_LEN		0x1000000
 
 #define CONFIG_MMCROOT                  "/dev/mmcblk0p2"  /* USDHC1 */
-#define CONFIG_SYS_MMC_IMG_LOAD_PART    1
 
 /* Using ULP WDOG for reset */
 #define WDOG_BASE_ADDR			WDG1_RBASE
@@ -48,7 +47,7 @@
 	"earlycon=lpuart32,0x402D0010\0" \
 	"ip_dyn=yes\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
diff --git a/include/configs/nas220.h b/include/configs/nas220.h
index 9f89cca0b01..815f81f6493 100644
--- a/include/configs/nas220.h
+++ b/include/configs/nas220.h
@@ -11,12 +11,6 @@
 #ifndef _CONFIG_NAS220_H
 #define _CONFIG_NAS220_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_FEROCEON_88FR131		/* #define CPU Core subversion */
-#define CONFIG_KW88F6192		/* SOC Name */
-
 /* power-on led, regulator, sata0, sata1 */
 #define NAS220_GE_OE_VAL_LOW ((1 << 12)|(1 << 14)|(1 << 24)|(1 << 28))
 #define NAS220_GE_OE_VAL_HIGH (0)
@@ -60,15 +54,7 @@
 #endif /* CONFIG_CMD_NET */
 
 /*
- * File system
- */
-#define CONFIG_JFFS2_NAND
-#define CONFIG_JFFS2_LZO
-
-/*
  * EFI partition
  */
 
-#define CONFIG_KIRKWOOD_GPIO
-
 #endif /* _CONFIG_NAS220_H */
diff --git a/include/configs/nokia_rx51.h b/include/configs/nokia_rx51.h
index c575798bf06..081101941ad 100644
--- a/include/configs/nokia_rx51.h
+++ b/include/configs/nokia_rx51.h
@@ -21,7 +21,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_SYS_L2CACHE_OFF		/* pretend there is no L2 CACHE */
 
 #include <asm/arch/cpu.h>		/* get chip and board defs */
 #include <asm/arch/omap.h>
diff --git a/include/configs/nsa310s.h b/include/configs/nsa310s.h
index cf52a6d0f06..8cc9ca6a49d 100644
--- a/include/configs/nsa310s.h
+++ b/include/configs/nsa310s.h
@@ -9,11 +9,6 @@
 #ifndef _CONFIG_NSA310S_H
 #define _CONFIG_NSA310S_H
 
-/* high level configuration options */
-#define CONFIG_FEROCEON_88FR131	1	/* CPU Core subversion */
-#define CONFIG_KW88F6192		1	/* SOC Name */
-#define CONFIG_KW88F6702		1	/* SOC Name */
-
 #include "mv-common.h"
 
 /* environment variables configuration */
@@ -41,9 +36,4 @@
 #define CONFIG_LBA48
 #endif /* CONFIG_SATA */
 
-/* RTC driver configuration */
-#ifdef CONFIG_CMD_DATE
-#define CONFIG_RTC_MV
-#endif /* CONFIG_CMD_DATE */
-
 #endif /* _CONFIG_NSA310S_H */
diff --git a/include/configs/octeontx2_common.h b/include/configs/octeontx2_common.h
index bc21b795cf6..536dff2bdfd 100644
--- a/include/configs/octeontx2_common.h
+++ b/include/configs/octeontx2_common.h
@@ -7,8 +7,6 @@
 #ifndef __OCTEONTX2_COMMON_H__
 #define __OCTEONTX2_COMMON_H__
 
-#define CONFIG_SUPPORT_RAW_INITRD
-
 /** Maximum size of image supported for bootm (and bootable FIT images) */
 #define CONFIG_SYS_BOOTM_LEN		(256 << 20)
 
@@ -43,7 +41,6 @@
 #if defined(CONFIG_MMC_OCTEONTX)
 #define MMC_SUPPORTS_TUNING
 /** EMMC specific defines */
-#define CONFIG_SUPPORT_EMMC_RPMB
 #endif
 
 #endif /* __OCTEONTX2_COMMON_H__ */
diff --git a/include/configs/octeontx_common.h b/include/configs/octeontx_common.h
index 46908be32a3..8185f4b6250 100644
--- a/include/configs/octeontx_common.h
+++ b/include/configs/octeontx_common.h
@@ -61,12 +61,6 @@
 # define CONFIG_SYS_64BIT_LBA
 #endif
 
-/***** SPI Defines *********/
-#ifdef CONFIG_DM_SPI_FLASH
-# define CONFIG_SF_DEFAULT_BUS	0
-# define CONFIG_SF_DEFAULT_CS	0
-#endif
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE		1024	/** Console I/O Buffer Size */
 #define CONFIG_SYS_BARGSIZE		CONFIG_SYS_CBSIZE
@@ -76,9 +70,6 @@
 #define CONFIG_SYS_MMC_MAX_BLK_COUNT	8192
 
 /** EMMC specific defines */
-#if defined(CONFIG_MMC_OCTEONTX)
-#define CONFIG_SUPPORT_EMMC_RPMB
-#endif
 
 #if defined(CONFIG_NAND_OCTEONTX)
 /*#define CONFIG_MTD_CONCAT */
diff --git a/include/configs/odroid.h b/include/configs/odroid.h
index 1a63f46160f..ed9b41d179d 100644
--- a/include/configs/odroid.h
+++ b/include/configs/odroid.h
@@ -13,7 +13,6 @@
 
 #include <configs/exynos4-common.h>
 
-#define CONFIG_SYS_L2CACHE_OFF
 #ifndef CONFIG_SYS_L2CACHE_OFF
 #define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE	0x10502000
diff --git a/include/configs/odroid_xu3.h b/include/configs/odroid_xu3.h
index 70481b5d0c8..a4825982a89 100644
--- a/include/configs/odroid_xu3.h
+++ b/include/configs/odroid_xu3.h
@@ -80,8 +80,6 @@
  * Need to override existing one (smdk5420) with odroid so set_board_info will
  * use proper prefix when creating full board_name (SYS_BOARD + type)
  */
-#undef CONFIG_SYS_BOARD
-#define CONFIG_SYS_BOARD		"odroid"
 
 /* Define new extra env settings, including DFU settings */
 #undef CONFIG_EXTRA_ENV_SETTINGS
diff --git a/include/configs/omapl138_lcdk.h b/include/configs/omapl138_lcdk.h
index bc707ebfdc8..45297b9a612 100644
--- a/include/configs/omapl138_lcdk.h
+++ b/include/configs/omapl138_lcdk.h
@@ -17,7 +17,6 @@
 /*
  * SoC Configuration
  */
-#define CONFIG_SYS_CLK_FREQ		clk_get(DAVINCI_ARM_CLKID)
 #define CONFIG_SYS_OSCIN_FREQ		24000000
 #define CONFIG_SYS_TIMERBASE		DAVINCI_TIMER0_BASE
 #define CONFIG_SYS_HZ_CLOCK		clk_get(DAVINCI_AUXCLK_CLKID)
diff --git a/include/configs/openrd.h b/include/configs/openrd.h
index bd27e503cad..43d089657b1 100644
--- a/include/configs/openrd.h
+++ b/include/configs/openrd.h
@@ -13,12 +13,6 @@
 #ifndef _CONFIG_OPENRD_H
 #define _CONFIG_OPENRD_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_SHEEVA_88SV131	1	/* CPU Core subversion */
-#define CONFIG_KW88F6281	1	/* SOC Name */
-
 #include "mv-common.h"
 
 /*
diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h
index 365f61bef88..2e1331b9b07 100644
--- a/include/configs/p1_p2_rdb_pc.h
+++ b/include/configs/p1_p2_rdb_pc.h
@@ -102,12 +102,10 @@
 #define CONFIG_SPL_NAND_INIT
 #define CONFIG_SPL_COMMON_INIT_DDR
 #define CONFIG_SPL_MAX_SIZE		(128 << 10)
-#define CONFIG_TPL_TEXT_BASE		0xf8f81000
 #define CONFIG_SYS_MPC85XX_NO_RESETVEC
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(832 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	(0x11000000)
 #define CONFIG_SYS_NAND_U_BOOT_START	(0x11000000)
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	((128 + 128) << 10)
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SPL_INIT_MINIMAL
 #define CONFIG_SPL_FLUSH_IMAGE
@@ -116,7 +114,6 @@
 #define CONFIG_SYS_NAND_U_BOOT_SIZE	(128 << 10)
 #define CONFIG_SYS_NAND_U_BOOT_DST	0xf8f80000
 #define CONFIG_SYS_NAND_U_BOOT_START	0xf8f80000
-#define CONFIG_SYS_NAND_U_BOOT_OFFS	(128 << 10)
 #endif /* not CONFIG_TPL_BUILD */
 
 #define CONFIG_SPL_PAD_TO		0x20000
@@ -130,7 +127,7 @@
 
 #ifndef CONFIG_SYS_MONITOR_BASE
 #ifdef CONFIG_TPL_BUILD
-#define CONFIG_SYS_MONITOR_BASE	CONFIG_TPL_TEXT_BASE
+#define CONFIG_SYS_MONITOR_BASE	0xf8f81000
 #elif defined(CONFIG_SPL_BUILD)
 #define CONFIG_SYS_MONITOR_BASE	CONFIG_SPL_TEXT_BASE
 #else
@@ -140,17 +137,10 @@
 
 #define CONFIG_PCIE1	/* PCIE controller 1 (slot 1) */
 #define CONFIG_PCIE2	/* PCIE controller 2 (slot 2) */
-#define CONFIG_SYS_PCI_64BIT	/* enable 64-bit PCI resources */
 
 #define CONFIG_SYS_SATA_MAX_DEVICE	2
 #define CONFIG_LBA48
 
-#if defined(CONFIG_TARGET_P2020RDB)
-#define CONFIG_SYS_CLK_FREQ	100000000
-#else
-#define CONFIG_SYS_CLK_FREQ	66666666
-#endif
-
 #define CONFIG_HWCONFIG
 /*
  * These can be toggled for performance analysis, otherwise use default.
@@ -534,7 +524,6 @@
 #if defined(CONFIG_HAS_FSL_DR_USB)
 #ifdef CONFIG_USB_EHCI_HCD
 #define CONFIG_EHCI_HCD_INIT_AFTER_RESET
-#define CONFIG_USB_EHCI_FSL
 #endif
 #endif
 
@@ -546,8 +535,6 @@
 #define CONFIG_SYS_FSL_ESDHC_ADDR	CONFIG_SYS_MPC85xx_ESDHC_ADDR
 #endif
 
-#undef CONFIG_WATCHDOG	/* watchdog disabled */
-
 /*
  * Miscellaneous configurable options
  */
diff --git a/include/configs/p3450-0000.h b/include/configs/p3450-0000.h
index 7f05bebbcd7..b03d3a433b7 100644
--- a/include/configs/p3450-0000.h
+++ b/include/configs/p3450-0000.h
@@ -24,12 +24,8 @@
 	func(DHCP, dhcp, na)
 
 /* Environment at end of QSPI, in the VER partition */
-#define CONFIG_ENV_SPI_MAX_HZ		48000000
-#define CONFIG_ENV_SPI_MODE		SPI_MODE_0
 #define CONFIG_SPI_FLASH_SIZE		(4 << 20)
 
-#define CONFIG_PREBOOT
-
 #define BOARD_EXTRA_ENV_SETTINGS \
 	"preboot=if test -e mmc 1:1 /u-boot-preboot.scr; then " \
 		"load mmc 1:1 ${scriptaddr} /u-boot-preboot.scr; " \
diff --git a/include/configs/phycore_imx8mm.h b/include/configs/phycore_imx8mm.h
index a9797362a8c..7438d0a4647 100644
--- a/include/configs/phycore_imx8mm.h
+++ b/include/configs/phycore_imx8mm.h
@@ -14,8 +14,6 @@
 #define CONFIG_SYS_BOOTM_LEN		SZ_64M
 #define CONFIG_SPL_MAX_SIZE		(148 * SZ_1K)
 #define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 #define CONFIG_SYS_UBOOT_BASE \
 		(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
@@ -39,7 +37,7 @@
 	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
 	"ip_dyn=yes\0" \
 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=2\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console} " \
@@ -97,6 +95,5 @@
 /* USDHC */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
 #endif /* __PHYCORE_IMX8MM_H */
diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h
index 7ca3965fc61..8c5ffeef544 100644
--- a/include/configs/phycore_imx8mp.h
+++ b/include/configs/phycore_imx8mp.h
@@ -14,8 +14,6 @@
 
 #define CONFIG_SPL_MAX_SIZE		(152 * SZ_1K)
 #define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 #define CONFIG_SYS_UBOOT_BASE \
 		(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
@@ -39,7 +37,7 @@
 	"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
 	"ip_dyn=yes\0" \
 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=2\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console} " \
@@ -97,6 +95,5 @@
 /* USDHC */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR       0
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
 #endif /* __PHYCORE_IMX8MP_H */
diff --git a/include/configs/pic32mzdask.h b/include/configs/pic32mzdask.h
index cc2e6a7ae89..3624c122fcd 100644
--- a/include/configs/pic32mzdask.h
+++ b/include/configs/pic32mzdask.h
@@ -33,9 +33,6 @@
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
 #define CONFIG_SYS_MONITOR_LEN		(192 << 10)
 
-#define CONFIG_SYS_ENV_ADDR		0x88300000
-#define CONFIG_SYS_FDT_ADDR		0x89d00000
-
 /* Memory Test */
 
 /*----------------------------------------------------------------------
@@ -74,8 +71,8 @@
 
 #define MEM_LAYOUT_ENV_SETTINGS					\
 	"kernel_addr_r="__stringify(CONFIG_SYS_LOAD_ADDR)"\0"	\
-	"fdt_addr_r="__stringify(CONFIG_SYS_FDT_ADDR)"\0"	\
-	"scriptaddr="__stringify(CONFIG_SYS_ENV_ADDR)"\0"
+	"fdt_addr_r=0x89d00000\0"				\
+	"scriptaddr=0x88300000\0"				\
 
 #define CONFIG_LEGACY_BOOTCMD_ENV					\
 	"legacy_bootcmd= "						\
diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h
index 3fe178316f7..6e1c3826488 100644
--- a/include/configs/pico-imx6ul.h
+++ b/include/configs/pico-imx6ul.h
@@ -64,8 +64,6 @@
 	"bootmenu_2=Boot using PICO-Pi baseboard=" \
 		"setenv fdtfile imx6ul-pico-pi.dtb\0" \
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"script=boot.scr\0" \
 	"image=zImage\0" \
diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h
index cbac9505492..6137f21bba9 100644
--- a/include/configs/pico-imx7d.h
+++ b/include/configs/pico-imx7d.h
@@ -65,9 +65,6 @@
 	BOOTENV
 #endif
 
-
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"image=zImage\0" \
 	"splashpos=m,m\0" \
diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h
index f1b406f0a8b..2293a2919e2 100644
--- a/include/configs/pico-imx8mq.h
+++ b/include/configs/pico-imx8mq.h
@@ -11,8 +11,6 @@
 
 #define CONFIG_SPL_MAX_SIZE		(124 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		(512 * 1024)
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 
 #ifdef CONFIG_SPL_BUILD
 /*#define CONFIG_ENABLE_DDR_TRAINING_DEBUG*/
@@ -56,7 +54,7 @@
 	"initrd_addr=0x43800000\0"					\
 	"initrd_high=0xffffffffffffffff\0"				\
 	"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0"		\
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0"	\
+	"mmcpart=1\0"	\
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0"			\
 	"mmcautodetect=yes\0"						\
 	"mmcargs=setenv bootargs console=${console} root=${mmcroot}\0 "	\
@@ -97,10 +95,6 @@
 #define PHYS_SDRAM			0x40000000
 #define PHYS_SDRAM_SIZE			0x80000000	/* 2 GiB DDR */
 
-#define CONFIG_SYS_MEMTEST_START	PHYS_SDRAM
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_MEMTEST_START + \
-					(PHYS_SDRAM_SIZE >> 1))
-
 #define CONFIG_MXC_UART_BASE		UART1_BASE_ADDR
 
 /* Monitor Command Prompt */
@@ -113,12 +107,6 @@
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
-#define CONFIG_MXC_GPIO
-
-#define CONFIG_OF_SYSTEM_SETUP
-
 #define CONFIG_SYS_BOOTM_LEN		SZ_128M
 
 #endif
diff --git a/include/configs/plutux.h b/include/configs/plutux.h
index 7fc06e8326b..9a4a632a521 100644
--- a/include/configs/plutux.h
+++ b/include/configs/plutux.h
@@ -19,7 +19,6 @@
 #define CONFIG_SYS_NS16550_COM1		NV_PA_APB_UARTD_BASE
 
 /* NAND support */
-#define CONFIG_TEGRA_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 
 /* Environment in NAND, aligned to start of last sector */
diff --git a/include/configs/pm9263.h b/include/configs/pm9263.h
index d4f78702981..e9eb736ecb1 100644
--- a/include/configs/pm9263.h
+++ b/include/configs/pm9263.h
@@ -179,11 +179,6 @@
 
 #endif
 
-#define CONFIG_JFFS2_NAND		1
-#define CONFIG_JFFS2_DEV		"nand0" /* NAND device jffs2 lives on */
-#define CONFIG_JFFS2_PART_OFFSET	0	/* start of jffs2 partition */
-#define CONFIG_JFFS2_PART_SIZE		(256 * 1024 * 1024) /* partition size*/
-
 /* PSRAM */
 #define	PHYS_PSRAM			0x70000000
 #define	PHYS_PSRAM_SIZE			0x00400000	/* 4MB */
diff --git a/include/configs/pm9g45.h b/include/configs/pm9g45.h
index eab38250216..b2053916421 100644
--- a/include/configs/pm9g45.h
+++ b/include/configs/pm9g45.h
@@ -45,7 +45,6 @@
 #define CONFIG_SYS_NAND_MASK_CLE		BIT(22)
 #define CONFIG_SYS_NAND_ENABLE_PIN		AT91_PIN_PC14
 #define CONFIG_SYS_NAND_READY_PIN		AT91_PIN_PD3
-#define CONFIG_SYS_NAND_DRIVER_ECC_LAYOUT
 #endif
 
 /* Ethernet */
diff --git a/include/configs/pogo_e02.h b/include/configs/pogo_e02.h
index 196e362bd74..3e94125cb35 100644
--- a/include/configs/pogo_e02.h
+++ b/include/configs/pogo_e02.h
@@ -12,12 +12,6 @@
 #ifndef _CONFIG_POGO_E02_H
 #define _CONFIG_POGO_E02_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_FEROCEON_88FR131		/* CPU Core subversion */
-#define CONFIG_KW88F6281		/* SOC Name */
-
 #include "mv-common.h"
 
 /*
diff --git a/include/configs/porter.h b/include/configs/porter.h
index 7ffcf5fc38a..867dadaedd0 100644
--- a/include/configs/porter.h
+++ b/include/configs/porter.h
@@ -35,8 +35,6 @@
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
-#define RMOBILE_XTAL_CLK	20000000u
-#define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
 
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	"bootm_size=0x10000000\0"
diff --git a/include/configs/presidio_asic.h b/include/configs/presidio_asic.h
index 3df51437ca2..928ccb1e18a 100644
--- a/include/configs/presidio_asic.h
+++ b/include/configs/presidio_asic.h
@@ -10,8 +10,6 @@
 
 #define CONFIG_REMAKE_ELF
 
-#define CONFIG_SUPPORT_RAW_INITRD
-
 #define CONFIG_SYS_INIT_SP_ADDR		0x00100000
 #define CONFIG_SYS_BOOTM_LEN		0x00c00000
 
diff --git a/include/configs/qemu-ppce500.h b/include/configs/qemu-ppce500.h
index 169d79c1faf..e257c0ec1f4 100644
--- a/include/configs/qemu-ppce500.h
+++ b/include/configs/qemu-ppce500.h
@@ -13,8 +13,6 @@
 
 #define CONFIG_SYS_RAMBOOT
 
-#define CONFIG_SYS_PCI_64BIT		/* enable 64-bit PCI resources */
-
 #define CONFIG_ENABLE_36BIT_PHYS
 
 /* Needed to fill the ccsrbar pointer */
@@ -47,8 +45,6 @@ extern unsigned long long get_phys_ccsrbar_addr_early(void);
 
 #define CONFIG_CHIP_SELECTS_PER_CTRL	0
 
-#define CONFIG_SYS_CLK_FREQ        33000000
-
 #define CONFIG_SYS_BOOT_BLOCK		0x00000000	/* boot TLB */
 
 #define CONFIG_SYS_MONITOR_BASE		CONFIG_SYS_TEXT_BASE
diff --git a/include/configs/r2dplus.h b/include/configs/r2dplus.h
index 1dd83dbf64d..8e86830e61b 100644
--- a/include/configs/r2dplus.h
+++ b/include/configs/r2dplus.h
@@ -1,7 +1,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_CPU_SH7751	1
 #define __LITTLE_ENDIAN__	1
 
 /* SCIF */
@@ -29,7 +28,6 @@
 /*
  * SuperH Clock setting
  */
-#define CONFIG_SYS_CLK_FREQ	60000000
 #define	CONFIG_SYS_PLL_SETTLING_TIME	100/* in us */
 
 /*
diff --git a/include/configs/rcar-gen2-common.h b/include/configs/rcar-gen2-common.h
index 595482c22e9..f1f5d07bf81 100644
--- a/include/configs/rcar-gen2-common.h
+++ b/include/configs/rcar-gen2-common.h
@@ -42,6 +42,6 @@
 #define CONFIG_TMU_TIMER
 #define CONFIG_SYS_TIMER_COUNTS_DOWN
 #define CONFIG_SYS_TIMER_COUNTER	(TMU_BASE + 0xc)	/* TCNT0 */
-#define CONFIG_SYS_TIMER_RATE		(CONFIG_SYS_CLK_FREQ / 8)
+#define CONFIG_SYS_TIMER_RATE		(get_board_sys_clk() / 8)
 
 #endif	/* __RCAR_GEN2_COMMON_H */
diff --git a/include/configs/rk3036_common.h b/include/configs/rk3036_common.h
index b133d8ec48b..00c453d739d 100644
--- a/include/configs/rk3036_common.h
+++ b/include/configs/rk3036_common.h
@@ -12,7 +12,6 @@
 
 #define CONFIG_ROCKCHIP_STIMER_BASE	0x200440a0
 #define COUNTER_FREQUENCY		24000000
-#define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SYS_HZ_CLOCK		24000000
 
 #define CONFIG_SYS_INIT_SP_ADDR		0x60100000
diff --git a/include/configs/rk3128_common.h b/include/configs/rk3128_common.h
index 8b7a0bbbca1..97caceacfe6 100644
--- a/include/configs/rk3128_common.h
+++ b/include/configs/rk3128_common.h
@@ -13,7 +13,6 @@
 
 #define CONFIG_ROCKCHIP_STIMER_BASE	0x200440a0
 #define COUNTER_FREQUENCY		24000000
-#define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SYS_HZ_CLOCK		24000000
 
 #define CONFIG_IRAM_BASE		0x10080000
diff --git a/include/configs/rk3188_common.h b/include/configs/rk3188_common.h
index e7c09645ec6..7449e816b7d 100644
--- a/include/configs/rk3188_common.h
+++ b/include/configs/rk3188_common.h
@@ -22,7 +22,6 @@
 
 /* spl size 32kb sram - 2kb bootrom */
 #define CONFIG_SPL_MAX_SIZE		(0x8000 - 0x800)
-#define CONFIG_ROCKCHIP_SERIAL		1
 
 #define CONFIG_SPL_STACK		0x10087fff
 
diff --git a/include/configs/rk322x_common.h b/include/configs/rk322x_common.h
index a46b1ffe865..ef55ef0a83b 100644
--- a/include/configs/rk322x_common.h
+++ b/include/configs/rk322x_common.h
@@ -13,7 +13,6 @@
 
 #define CONFIG_ROCKCHIP_STIMER_BASE	0x110d0020
 #define COUNTER_FREQUENCY		24000000
-#define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SYS_HZ_CLOCK		24000000
 
 #define CONFIG_SYS_INIT_SP_ADDR		0x61100000
diff --git a/include/configs/rk3288_common.h b/include/configs/rk3288_common.h
index abbb27395e6..490da7cb23b 100644
--- a/include/configs/rk3288_common.h
+++ b/include/configs/rk3288_common.h
@@ -15,7 +15,6 @@
 
 #define CONFIG_ROCKCHIP_STIMER_BASE	0xff810020
 #define COUNTER_FREQUENCY		24000000
-#define CONFIG_SYS_ARCH_TIMER
 #define CONFIG_SYS_HZ_CLOCK		24000000
 
 #ifdef CONFIG_SPL_ROCKCHIP_BACK_TO_BROM
diff --git a/include/configs/rk3308_common.h b/include/configs/rk3308_common.h
index 496f4628d34..1664707ca65 100644
--- a/include/configs/rk3308_common.h
+++ b/include/configs/rk3308_common.h
@@ -12,7 +12,6 @@
 #define CONFIG_SPL_MAX_SIZE		0x20000
 #define CONFIG_SPL_BSS_START_ADDR	0x00400000
 #define CONFIG_SPL_BSS_MAX_SIZE		0x2000
-#define CONFIG_SYS_SPI_U_BOOT_OFFS	0x8000
 
 #define CONFIG_SYS_NS16550_MEM32
 
diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h
index 2e94613c37a..207ad007663 100644
--- a/include/configs/s5p4418_nanopi2.h
+++ b/include/configs/s5p4418_nanopi2.h
@@ -104,16 +104,6 @@
 					 (void *)PHY_BASEADDR_UART3}
 
 /*-----------------------------------------------------------------------
- * PLL
- */
-#define CONFIG_SYS_PLLFIN		24000000UL
-
-/*-----------------------------------------------------------------------
- * Timer
- */
-#define CONFIG_TIMER_SYS_TICK_CH	0
-
-/*-----------------------------------------------------------------------
  * BACKLIGHT
  */
 #ifndef CONFIG_S5P4418_ONEWIRE
diff --git a/include/configs/s5p_goni.h b/include/configs/s5p_goni.h
index 14840a453a6..e3b091a9370 100644
--- a/include/configs/s5p_goni.h
+++ b/include/configs/s5p_goni.h
@@ -18,9 +18,6 @@
 #include <linux/sizes.h>
 #include <asm/arch/cpu.h>		/* get chip and board defs */
 
-/* input clock of PLL: has 24MHz input clock at S5PC110 */
-#define CONFIG_SYS_CLK_FREQ_C110	24000000
-
 /* DRAM Base */
 #define CONFIG_SYS_SDRAM_BASE		0x30000000
 
diff --git a/include/configs/s5pc210_universal.h b/include/configs/s5pc210_universal.h
index 680f6ce60be..29adab33924 100644
--- a/include/configs/s5pc210_universal.h
+++ b/include/configs/s5pc210_universal.h
@@ -14,7 +14,6 @@
 #define CONFIG_TIZEN			/* TIZEN lib */
 
 /* Keep L2 Cache Disabled */
-#define CONFIG_SYS_L2CACHE_OFF		1
 
 /* Universal has 2 banks of DRAM */
 #define CONFIG_SYS_SDRAM_BASE		0x40000000
@@ -104,11 +103,6 @@
 
 #define CONFIG_USB_GADGET_DWC2_OTG_PHY
 
-/*
- * SPI Settings
- */
-#define CONFIG_SOFT_SPI
-
 #ifndef	__ASSEMBLY__
 void universal_spi_scl(int bit);
 void universal_spi_sda(int bit);
diff --git a/include/configs/salvator-x.h b/include/configs/salvator-x.h
index 1eafff10ff3..c29b34e231a 100644
--- a/include/configs/salvator-x.h
+++ b/include/configs/salvator-x.h
@@ -23,7 +23,6 @@
 #define CONFIG_FLASH_SHOW_PROGRESS	45
 #define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_SYS_FLASH_BANKS_LIST	{ 0x08000000 }
-#define CONFIG_SYS_FLASH_CFI
 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT	1
 #define CONFIG_SYS_MAX_FLASH_SECT	256
diff --git a/include/configs/sama5d2_icp.h b/include/configs/sama5d2_icp.h
index a62a5fa4183..c3a5c2ae323 100644
--- a/include/configs/sama5d2_icp.h
+++ b/include/configs/sama5d2_icp.h
@@ -25,11 +25,6 @@
 	(CONFIG_SYS_SDRAM_BASE + 16 * 1024 - GENERATED_GBL_DATA_SIZE)
 #endif
 
-/* NAND flash */
-
-/* SPI flash */
-#define CONFIG_SF_DEFAULT_SPEED		66000000
-
 #ifdef CONFIG_SD_BOOT
 /* u-boot env in sd/mmc card */
 #define FAT_ENV_INTERFACE	"mmc"
diff --git a/include/configs/sama5d2_xplained.h b/include/configs/sama5d2_xplained.h
index 34fd272467a..11c13c65d8d 100644
--- a/include/configs/sama5d2_xplained.h
+++ b/include/configs/sama5d2_xplained.h
@@ -30,12 +30,6 @@
 
 #endif
 
-#ifdef CONFIG_QSPI_BOOT
-#undef CONFIG_ENV_SPI_BUS
-#define CONFIG_ENV_SPI_BUS	1
-
-#endif
-
 /* SPL */
 #define CONFIG_SPL_MAX_SIZE		0x10000
 #define CONFIG_SPL_BSS_START_ADDR	0x20000000
diff --git a/include/configs/seaboard.h b/include/configs/seaboard.h
index c51517a76bf..e6c200f7612 100644
--- a/include/configs/seaboard.h
+++ b/include/configs/seaboard.h
@@ -27,7 +27,6 @@
 /* Environment in eMMC, at the end of 2nd "boot sector" */
 
 /* NAND support */
-#define CONFIG_TEGRA_NAND
 
 /* Max number of NAND devices */
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
diff --git a/include/configs/sheevaplug.h b/include/configs/sheevaplug.h
index bb7ce8d3ede..8dba4fcb4f8 100644
--- a/include/configs/sheevaplug.h
+++ b/include/configs/sheevaplug.h
@@ -9,12 +9,7 @@
 #ifndef _CONFIG_SHEEVAPLUG_H
 #define _CONFIG_SHEEVAPLUG_H
 
-/*
- * High Level Configuration Options (easy to change)
- */
-#define CONFIG_FEROCEON_88FR131	1	/* CPU Core subversion */
-
-#include "mv-plug-common.h"
+#include "mv-common.h"
 
 /*
  *  Environment variables configurations
diff --git a/include/configs/siemens-ccp-common.h b/include/configs/siemens-ccp-common.h
deleted file mode 100644
index 01051c8ad7d..00000000000
--- a/include/configs/siemens-ccp-common.h
+++ /dev/null
@@ -1,19 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/* Be very careful updating CONFIG_IDENT_STRING
- * This string will control the update flow whether an U-Boot should be
- * updated or not. If the version of installed U-Boot (in flash) is smaller
- * than the version to be installed (from update file), an update will
- * be performed.
- *
- * General rules:
- * 1. First 4 characters ' ##v' or  IDENT_MAGIC represent kind of a magic number
- *    to identify the following strings after easily. Don't change them!
- *
- * 2. First 2 digits after 'v' or CCP_MAJOR are updated with U-Boot version
- *    change, e.g. from 2015.04 to 2018.03
- *
- * 3. Second 2 digits after '.' or CCP_MINOR are updated if we want to upgrade
- *    U-Boot within an U-Boot version.
- */
-#define CCP_IDENT_MAGIC			" ##v"
-#define GENERATE_CCP_VERSION(MAJOR, MINOR)	CCP_IDENT_MAGIC MAJOR "." MINOR
diff --git a/include/configs/sifive-unleashed.h b/include/configs/sifive-unleashed.h
index 85356789eff..920f3140f64 100644
--- a/include/configs/sifive-unleashed.h
+++ b/include/configs/sifive-unleashed.h
@@ -74,10 +74,6 @@
 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
 	BOOTENV \
 	BOOTENV_SF
-
-#define CONFIG_PREBOOT \
-	"setenv fdt_addr ${fdtcontroladdr};" \
-	"fdt addr ${fdtcontroladdr};"
 #endif
 
 #endif /* __CONFIG_H */
diff --git a/include/configs/sifive-unmatched.h b/include/configs/sifive-unmatched.h
index f68d7d7676f..30adfe948f1 100644
--- a/include/configs/sifive-unmatched.h
+++ b/include/configs/sifive-unmatched.h
@@ -32,8 +32,6 @@
 
 #define CONFIG_STANDALONE_LOAD_ADDR	0x80200000
 
-#define CONFIG_SYS_PCI_64BIT		1	/* enable 64-bit resources */
-
 #define CONFIG_SYS_SCSI_MAX_SCSI_ID	4
 
 /* Environment options */
@@ -72,10 +70,6 @@
 	"partitions=" PARTS_DEFAULT "\0" \
 	"fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
 	BOOTENV
-
-#define CONFIG_PREBOOT \
-	"setenv fdt_addr ${fdtcontroladdr};" \
-	"fdt addr ${fdtcontroladdr};"
 #endif /* CONFIG_SPL_BUILD */
 
 #define CONFIG_SYS_EEPROM_BUS_NUM		0
diff --git a/include/configs/silk.h b/include/configs/silk.h
index eee60fdfabd..29350a635b2 100644
--- a/include/configs/silk.h
+++ b/include/configs/silk.h
@@ -35,8 +35,6 @@
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
-#define RMOBILE_XTAL_CLK	20000000u
-#define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
 
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	"bootm_size=0x10000000\0"
diff --git a/include/configs/smdkc100.h b/include/configs/smdkc100.h
index 8fdb692713c..28ff48bf3d7 100644
--- a/include/configs/smdkc100.h
+++ b/include/configs/smdkc100.h
@@ -22,7 +22,6 @@
 #include <asm/arch/cpu.h>		/* get chip and board defs */
 
 /* input clock of PLL: SMDKC100 has 12MHz input clock */
-#define CONFIG_SYS_CLK_FREQ		12000000
 
 /* DRAM Base */
 #define CONFIG_SYS_SDRAM_BASE		0x30000000
diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h
index 47d4f687781..a7f77566042 100644
--- a/include/configs/smegw01.h
+++ b/include/configs/smegw01.h
@@ -16,7 +16,6 @@
 
 /* MMC Config*/
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
 #define CONFIG_EXTRA_ENV_SETTINGS \
 	"image=zImage\0" \
diff --git a/include/configs/snapper9g45.h b/include/configs/snapper9g45.h
index de918e76803..3889a88ae98 100644
--- a/include/configs/snapper9g45.h
+++ b/include/configs/snapper9g45.h
@@ -45,9 +45,6 @@
 #define CONFIG_AT91_WANTS_COMMON_PHY
 #define CONFIG_TFTP_PORT
 
-/* MMC */
-#define CONFIG_GENERIC_ATMEL_MCI
-
 /* LCD */
 #define CONFIG_ATMEL_LCD
 #define CONFIG_GURNARD_SPLASH
diff --git a/include/configs/socfpga_arria5_secu1.h b/include/configs/socfpga_arria5_secu1.h
index 9ce5fa62d56..0935eaedacb 100644
--- a/include/configs/socfpga_arria5_secu1.h
+++ b/include/configs/socfpga_arria5_secu1.h
@@ -95,7 +95,4 @@
 /* The rest of the configuration is shared */
 #include <configs/socfpga_common.h>
 
-#undef CONFIG_WATCHDOG_TIMEOUT_MSECS
-#define CONFIG_WATCHDOG_TIMEOUT_MSECS	60000
-
 #endif	/* __CONFIG_SOCFPGA_SECU1_H__ */
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h
index 31f95f52f8c..155aece4c31 100644
--- a/include/configs/socfpga_common.h
+++ b/include/configs/socfpga_common.h
@@ -187,10 +187,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
 #if defined(CONFIG_SPL_FS_FAT) || defined(CONFIG_SPL_FS_EXT4)
 #define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
 #endif
-#else
-#ifndef CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_PARTITION	1
-#endif
 #endif
 
 /* SPL QSPI boot support */
diff --git a/include/configs/socfpga_soc64_common.h b/include/configs/socfpga_soc64_common.h
index 4d7072c4dbf..928582ab8cf 100644
--- a/include/configs/socfpga_soc64_common.h
+++ b/include/configs/socfpga_soc64_common.h
@@ -60,7 +60,6 @@
 /* Flash device info */
 
 #ifndef CONFIG_SPL_BUILD
-#define CONFIG_MTD_PARTITIONS
 #define MTDIDS_DEFAULT			"nor0=ff705000.spi.0"
 #endif /* CONFIG_SPL_BUILD */
 
@@ -148,7 +147,6 @@ unsigned int cm_get_qspi_controller_clk_hz(void);
  * L4 Watchdog
  */
 #ifndef CONFIG_SPL_BUILD
-#undef CONFIG_HW_WATCHDOG
 #undef CONFIG_DESIGNWARE_WATCHDOG
 #endif
 #define CONFIG_DW_WDT_BASE		SOCFPGA_L4WD0_ADDRESS
diff --git a/include/configs/socrates.h b/include/configs/socrates.h
index b7296daa374..15e93d044ef 100644
--- a/include/configs/socrates.h
+++ b/include/configs/socrates.h
@@ -38,10 +38,6 @@
  * in the README.mpc85xxads.
  */
 
-#ifndef CONFIG_SYS_CLK_FREQ
-#define CONFIG_SYS_CLK_FREQ	66666666
-#endif
-
 /*
  * These can be toggled for performance analysis, otherwise use default.
  */
@@ -181,8 +177,6 @@
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
 
-#undef CONFIG_WATCHDOG			/* watchdog disabled		*/
-
 /*
  * Miscellaneous configurable options
  */
diff --git a/include/configs/stmark2.h b/include/configs/stmark2.h
index 1a5cf6b7811..18a57f2231b 100644
--- a/include/configs/stmark2.h
+++ b/include/configs/stmark2.h
@@ -41,9 +41,6 @@
 #define CONFIG_RTC_MCFRRTC
 #define CONFIG_SYS_MCFRRTC_BASE		0xFC0A8000
 
-/* spi not partitions */
-#define CONFIG_JFFS2_DEV		"nor0"
-
 /* Timer */
 #define CONFIG_MCFTMR
 
diff --git a/include/configs/stout.h b/include/configs/stout.h
index a1e7e86f39a..df2d9676b5e 100644
--- a/include/configs/stout.h
+++ b/include/configs/stout.h
@@ -39,8 +39,6 @@
 #define CONFIG_BITBANGMII_MULTI
 
 /* Board Clock */
-#define RMOBILE_XTAL_CLK	20000000u
-#define CONFIG_SYS_CLK_FREQ	RMOBILE_XTAL_CLK
 
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	"bootm_size=0x10000000\0"
diff --git a/include/configs/synquacer.h b/include/configs/synquacer.h
index 3d099b4f11f..04095891525 100644
--- a/include/configs/synquacer.h
+++ b/include/configs/synquacer.h
@@ -41,15 +41,11 @@
 #define CONFIG_SYS_FLASH_BASE		(0x08000000)
 #define CONFIG_SYS_FLASH_BANKS_LIST	{CONFIG_SYS_FLASH_BASE}
 
-#define CONFIG_SYS_MEMTEST_START	(CONFIG_SYS_SDRAM_BASE + (512 * 1024))
-#define CONFIG_SYS_MEMTEST_END		(CONFIG_SYS_SDRAM_BASE + PHYS_SDRAM_SIZE)
-
 #define CONFIG_SYS_CBSIZE		1024
 #define CONFIG_SYS_MAXARGS		128
 #define CONFIG_SYS_PBSIZE		(CONFIG_SYS_CBSIZE + sizeof(CONFIG_SYS_PROMPT) + 16)
 
 /* Since U-Boot 64bit PCIe support is limited, disable 64bit MMIO support */
-/* #define CONFIG_SYS_PCI_64BIT		1 */
 
 #define DEFAULT_DFU_ALT_INFO "dfu_alt_info="				\
 			"mtd nor1=u-boot.bin raw 200000 100000;"	\
diff --git a/include/configs/tam3517-common.h b/include/configs/tam3517-common.h
deleted file mode 100644
index a47e2c5b285..00000000000
--- a/include/configs/tam3517-common.h
+++ /dev/null
@@ -1,281 +0,0 @@
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * Copyright (C) 2011
- * Stefano Babic, DENX Software Engineering, [email protected].
- *
- * Copyright (C) 2009 TechNexion Ltd.
- */
-
-#ifndef __TAM3517_H
-#define __TAM3517_H
-
-/*
- * High Level Configuration Options
- */
-
-#include <asm/arch/cpu.h>		/* get chip and board defs */
-#include <asm/arch/omap.h>
-
-/* Clock Defines */
-#define V_OSCK			26000000	/* Clock output from T2 */
-#define V_SCLK			(V_OSCK >> 1)
-
-/*
- * DDR related
- */
-#define CONFIG_SYS_CS0_SIZE		(256 * 1024 * 1024)
-
-/*
- * Hardware drivers
- */
-
-/*
- * NS16550 Configuration
- */
-#define CONFIG_SYS_NS16550_SERIAL
-#define CONFIG_SYS_NS16550_REG_SIZE	(-4)
-#define CONFIG_SYS_NS16550_CLK		48000000	/* 48MHz (APLL96/2) */
-
-/*
- * select serial console configuration
- */
-#define CONFIG_SYS_NS16550_COM1		OMAP34XX_UART1
-
-#define CONFIG_SYS_BAUDRATE_TABLE	{4800, 9600, 19200, 38400, 57600,\
-					115200}
-
-#define CONFIG_SYS_I2C_EEPROM_ADDR_OVERFLOW	0x07
-
-/*
- * Board NAND Info.
- */
-#define CONFIG_SYS_NAND_BASE		NAND_BASE	/* physical address */
-							/* to access */
-							/* nand at CS0 */
-
-#define CONFIG_SYS_MAX_NAND_DEVICE	1		/* Max number of */
-							/* NAND devices */
-
-/*
- * Miscellaneous configurable options
- */
-#define CONFIG_SYS_CBSIZE		512	/* Console I/O Buffer Size */
-
-#define CONFIG_SYS_MAXARGS		32	/* max number of command */
-						/* args */
-
-/*
- * AM3517 has 12 GP timers, they can be driven by the system clock
- * (12/13/16.8/19.2/38.4MHz) or by 32KHz clock. We use 13MHz (V_SCLK).
- * This rate is divided by a local divisor.
- */
-#define CONFIG_SYS_TIMERBASE		OMAP34XX_GPT2
-#define CONFIG_SYS_PTV			2	/* Divisor: 2^(PTV+1) => 8 */
-
-/*
- * Physical Memory Map
- */
-#define PHYS_SDRAM_1		OMAP34XX_SDRC_CS0
-#define PHYS_SDRAM_2		OMAP34XX_SDRC_CS1
-
-/*
- * FLASH and environment organization
- */
-
-/* **** PISMO SUPPORT *** */
-
-/* Redundant Environment */
-#define CONFIG_SYS_ENV_SECT_SIZE	(128 << 10)	/* 128 KiB */
-
-#define CONFIG_SYS_SDRAM_BASE		PHYS_SDRAM_1
-#define CONFIG_SYS_INIT_RAM_ADDR	0x4020f800
-#define CONFIG_SYS_INIT_RAM_SIZE	0x800
-#define CONFIG_SYS_INIT_SP_ADDR		(CONFIG_SYS_INIT_RAM_ADDR + \
-					 CONFIG_SYS_INIT_RAM_SIZE - \
-					 GENERATED_GBL_DATA_SIZE)
-
-/*
- * ethernet support, EMAC
- *
- */
-#define CONFIG_NET_RETRY_COUNT 10
-
-/* Defines for SPL */
-#define CONFIG_SPL_CONSOLE
-#define CONFIG_SPL_NAND_SOFTECC
-#define CONFIG_SPL_NAND_WORKSPACE	0x8f07f000 /* below BSS */
-
-#define CONFIG_SPL_MAX_SIZE		(SRAM_SCRATCH_SPACE_ADDR - \
-					 CONFIG_SPL_TEXT_BASE)
-#define CONFIG_SPL_STACK		LOW_LEVEL_SRAM_STACK
-
-#define CONFIG_SYS_SPL_MALLOC_START	0x8f000000
-#define CONFIG_SYS_SPL_MALLOC_SIZE	0x80000
-#define CONFIG_SPL_BSS_START_ADDR	0x8f080000 /* end of RAM */
-#define CONFIG_SPL_BSS_MAX_SIZE		0x80000
-
-#define CONFIG_SPL_FS_LOAD_PAYLOAD_NAME		"u-boot.img"
-
-/* FAT */
-#define CONFIG_SPL_FS_LOAD_KERNEL_NAME		"uImage"
-#define CONFIG_SPL_FS_LOAD_ARGS_NAME		"args"
-
-/* RAW SD card / eMMC */
-#define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	0x900	/* address 0x120000 */
-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTOR	0x80	/* address 0x10000 */
-#define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	0x80	/* 64KiB */
-
-/* NAND boot config */
-#define CONFIG_SYS_NAND_ECCPOS		{40, 41, 42, 43, 44, 45, 46, 47,\
-					 48, 49, 50, 51, 52, 53, 54, 55,\
-					 56, 57, 58, 59, 60, 61, 62, 63}
-#define CONFIG_SYS_NAND_ECCSIZE		256
-#define CONFIG_SYS_NAND_ECCBYTES	3
-
-#define CONFIG_SYS_NAND_U_BOOT_START	CONFIG_SYS_TEXT_BASE
-
-#define CONFIG_SYS_NAND_U_BOOT_SIZE	0x80000
-
-/* Setup MTD for NAND on the SOM */
-
-#define	CONFIG_TAM3517_SETTINGS						\
-	"netdev=eth0\0"							\
-	"nandargs=setenv bootargs root=${nandroot} "			\
-		"rootfstype=${nandrootfstype}\0"			\
-	"nfsargs=setenv bootargs root=/dev/nfs rw "			\
-		"nfsroot=${serverip}:${rootpath}\0"			\
-	"ramargs=setenv bootargs root=/dev/ram rw\0"			\
-	"addip_sta=setenv bootargs ${bootargs} "			\
-		"ip=${ipaddr}:${serverip}:${gatewayip}:${netmask}"	\
-		":${hostname}:${netdev}:off panic=1\0"			\
-	"addip_dyn=setenv bootargs ${bootargs} ip=dhcp\0"		\
-	"addip=if test -n ${ipdyn};then run addip_dyn;"			\
-		"else run addip_sta;fi\0"				\
-	"addmtd=setenv bootargs ${bootargs} ${mtdparts}\0"		\
-	"addtty=setenv bootargs ${bootargs}"				\
-		" console=ttyO0,${baudrate}\0"				\
-	"addmisc=setenv bootargs ${bootargs} ${misc}\0"			\
-	"loadaddr=82000000\0"						\
-	"kernel_addr_r=82000000\0"					\
-	"hostname=" CONFIG_HOSTNAME "\0"			\
-	"bootfile=" CONFIG_HOSTNAME "/uImage\0"		\
-	"flash_self=run ramargs addip addtty addmtd addmisc;"		\
-		"bootm ${kernel_addr} ${ramdisk_addr}\0"		\
-	"flash_nfs=run nfsargs addip addtty addmtd addmisc;"		\
-		"bootm ${kernel_addr}\0"				\
-	"nandboot=run nandargs addip addtty addmtd addmisc;"		\
-		"nand read ${kernel_addr_r} kernel\0"			\
-		"bootm ${kernel_addr_r}\0"				\
-	"net_nfs=tftp ${kernel_addr_r} ${bootfile}; "			\
-		"run nfsargs addip addtty addmtd addmisc;"		\
-		"bootm ${kernel_addr_r}\0"				\
-	"net_self=if run net_self_load;then "				\
-		"run ramargs addip addtty addmtd addmisc;"		\
-		"bootm ${kernel_addr_r} ${ramdisk_addr_r};"		\
-		"else echo Images not loades;fi\0"			\
-	"u-boot=" CONFIG_HOSTNAME "/u-boot.img\0"		\
-	"load=tftp ${loadaddr} ${u-boot}\0"				\
-	"loadmlo=tftp ${loadaddr} ${mlo}\0"				\
-	"mlo=" CONFIG_HOSTNAME "/MLO\0"			\
-	"uboot_addr=0x80000\0"						\
-	"update=nandecc sw;nand erase ${uboot_addr} 100000;"		\
-		"nand write ${loadaddr} ${uboot_addr} 80000\0"		\
-	"updatemlo=nandecc hw;nand erase 0 20000;"			\
-		"nand write ${loadaddr} 0 20000\0"			\
-	"upd=if run load;then echo Updating u-boot;if run update;"	\
-		"then echo U-Boot updated;"				\
-			"else echo Error updating u-boot !;"		\
-			"echo Board without bootloader !!;"		\
-		"fi;"							\
-		"else echo U-Boot not downloaded..exiting;fi\0"		\
-
-/*
- * this is common code for all TAM3517 boards.
- * MAC address is stored from manufacturer in
- * I2C EEPROM
- */
-#if !(defined(__KERNEL_STRICT_NAMES) || defined(__ASSEMBLY__))
-/*
- * The I2C EEPROM on the TAM3517 contains
- * mac address and production data
- */
-struct tam3517_module_info {
-	char customer[48];
-	char product[48];
-
-	/*
-	 * bit 0~47  : sequence number
-	 * bit 48~55 : week of year, from 0.
-	 * bit 56~63 : year
-	 */
-	unsigned long long sequence_number;
-
-	/*
-	 * bit 0~7   : revision fixed
-	 * bit 8~15  : revision major
-	 * bit 16~31 : TNxxx
-	 */
-	unsigned int revision;
-	unsigned char eth_addr[4][8];
-	unsigned char _rev[100];
-};
-
-#define TAM3517_READ_EEPROM(info, ret) \
-do {								\
-	i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE); \
-	if (eeprom_read(CONFIG_SYS_I2C_EEPROM_ADDR, 0,		\
-		(void *)info, sizeof(*info)))			\
-		ret = 1;					\
-	else							\
-		ret = 0;					\
-} while (0)
-
-#define TAM3517_READ_MAC_FROM_EEPROM(info)			\
-do {								\
-	char buf[80], ethname[20];				\
-	int i;							\
-	memset(buf, 0, sizeof(buf));				\
-	for (i = 0 ; i < ARRAY_SIZE((info)->eth_addr); i++) {	\
-		sprintf(buf, "%02X:%02X:%02X:%02X:%02X:%02X",	\
-			(info)->eth_addr[i][5],			\
-			(info)->eth_addr[i][4],			\
-			(info)->eth_addr[i][3],			\
-			(info)->eth_addr[i][2],			\
-			(info)->eth_addr[i][1],			\
-			(info)->eth_addr[i][0]);			\
-								\
-		if (i)						\
-			sprintf(ethname, "eth%daddr", i);	\
-		else						\
-			strcpy(ethname, "ethaddr");		\
-		printf("Setting %s from EEPROM with %s\n", ethname, buf);\
-		env_set(ethname, buf);				\
-	}							\
-} while (0)
-
-/* The following macros are taken from Technexion's documentation */
-#define TAM3517_sequence_number(info) \
-	((info)->sequence_number % 0x1000000000000LL)
-#define TAM3517_week_of_year(info) (((info)->sequence_number >> 48) % 0x100)
-#define TAM3517_year(info) ((info)->sequence_number >> 56)
-#define TAM3517_revision_fixed(info) ((info)->revision % 0x100)
-#define TAM3517_revision_major(info) (((info)->revision >> 8) % 0x100)
-#define TAM3517_revision_tn(info) ((info)->revision >> 16)
-
-#define TAM3517_PRINT_SOM_INFO(info)				\
-do {								\
-	printf("Vendor:%s\n", (info)->customer);		\
-	printf("SOM:   %s\n", (info)->product);			\
-	printf("SeqNr: %02llu%02llu%012llu\n",			\
-		TAM3517_year(info),				\
-		TAM3517_week_of_year(info),			\
-		TAM3517_sequence_number(info));			\
-	printf("Rev:   TN%u %u.%u\n",				\
-		TAM3517_revision_tn(info),			\
-		TAM3517_revision_major(info),			\
-		TAM3517_revision_fixed(info));			\
-} while (0)
-
-#endif
-
-#endif /* __TAM3517_H */
diff --git a/include/configs/tec.h b/include/configs/tec.h
index aa9665eab59..432ccbdc32b 100644
--- a/include/configs/tec.h
+++ b/include/configs/tec.h
@@ -19,7 +19,6 @@
 #define CONFIG_SYS_NS16550_COM1		NV_PA_APB_UARTD_BASE
 
 /* NAND support */
-#define CONFIG_TEGRA_NAND
 #define CONFIG_SYS_MAX_NAND_DEVICE	1
 
 /* Environment in NAND, aligned to start of last sector */
diff --git a/include/configs/tegra-common.h b/include/configs/tegra-common.h
index 673056ce517..99b7bd07aa0 100644
--- a/include/configs/tegra-common.h
+++ b/include/configs/tegra-common.h
@@ -12,7 +12,6 @@
 /*
  * High Level Configuration Options
  */
-#define CONFIG_SYS_L2CACHE_OFF		/* No L2 cache */
 
 #include <asm/arch/tegra.h>		/* get chip and board defs */
 
diff --git a/include/configs/tegra20-common.h b/include/configs/tegra20-common.h
index 063213cbfeb..fac86927285 100644
--- a/include/configs/tegra20-common.h
+++ b/include/configs/tegra20-common.h
@@ -79,6 +79,4 @@
  */
 #define CONFIG_USB_EHCI_TXFIFO_THRESH	0x10
 
-#define CONFIG_SYS_NAND_SELF_INIT
-
 #endif /* _TEGRA20_COMMON_H_ */
diff --git a/include/configs/ti816x_evm.h b/include/configs/ti816x_evm.h
index 44dca25b43c..533673ba5d3 100644
--- a/include/configs/ti816x_evm.h
+++ b/include/configs/ti816x_evm.h
@@ -27,7 +27,6 @@
 /**
  * Platform/Board specific defs
  */
-#define CONFIG_SYS_CLK_FREQ     27000000
 #define CONFIG_SYS_TIMERBASE    0x4802E000
 #define CONFIG_SYS_PTV          2   /* Divisor: 2^(PTV+1) => 8 */
 
diff --git a/include/configs/trats.h b/include/configs/trats.h
index d34b9e8e6cd..5217400b6bd 100644
--- a/include/configs/trats.h
+++ b/include/configs/trats.h
@@ -15,7 +15,6 @@
 
 #define CONFIG_TIZEN			/* TIZEN lib */
 
-#define CONFIG_SYS_L2CACHE_OFF
 #ifndef CONFIG_SYS_L2CACHE_OFF
 #define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE	0x10502000
diff --git a/include/configs/trats2.h b/include/configs/trats2.h
index 32e7b91de9e..8d4b782372c 100644
--- a/include/configs/trats2.h
+++ b/include/configs/trats2.h
@@ -14,7 +14,6 @@
 
 #define CONFIG_TIZEN			/* TIZEN lib */
 
-#define CONFIG_SYS_L2CACHE_OFF
 #ifndef CONFIG_SYS_L2CACHE_OFF
 #define CONFIG_SYS_L2_PL310
 #define CONFIG_SYS_PL310_BASE	0x10502000
diff --git a/include/configs/ulcb.h b/include/configs/ulcb.h
index 1ce844f4920..bdd6b4b0d93 100644
--- a/include/configs/ulcb.h
+++ b/include/configs/ulcb.h
@@ -23,7 +23,6 @@
 #define CONFIG_FLASH_SHOW_PROGRESS	45
 #define CONFIG_SYS_FLASH_QUIET_TEST
 #define CONFIG_SYS_FLASH_BANKS_LIST	{ 0x08000000 }
-#define CONFIG_SYS_FLASH_CFI
 #define CONFIG_SYS_FLASH_CFI_WIDTH	FLASH_CFI_16BIT
 #define CONFIG_SYS_MAX_FLASH_BANKS_DETECT	1
 #define CONFIG_SYS_MAX_FLASH_SECT	256
diff --git a/include/configs/uniphier.h b/include/configs/uniphier.h
index b91b0db2c47..fb7b83d285d 100644
--- a/include/configs/uniphier.h
+++ b/include/configs/uniphier.h
@@ -198,6 +198,4 @@
 
 #define CONFIG_SPL_PAD_TO			0x20000
 
-#define CONFIG_SYS_PCI_64BIT
-
 #endif /* __CONFIG_UNIPHIER_H__ */
diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h
index 77da2bfdd79..0faa656bc63 100644
--- a/include/configs/usbarmory.h
+++ b/include/configs/usbarmory.h
@@ -10,8 +10,6 @@
 #ifndef __CONFIG_H
 #define __CONFIG_H
 
-#define CONFIG_SYS_FSL_CLK
-
 #include <asm/arch/imx-regs.h>
 
 /* U-Boot environment */
diff --git a/include/configs/verdin-imx8mm.h b/include/configs/verdin-imx8mm.h
index 7fbec270bff..17583c0a6af 100644
--- a/include/configs/verdin-imx8mm.h
+++ b/include/configs/verdin-imx8mm.h
@@ -11,8 +11,6 @@
 
 #define CONFIG_SPL_MAX_SIZE		(148 * 1024)
 #define CONFIG_SYS_MONITOR_LEN		SZ_512K
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_USE_SECTOR
-#define CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR	0x300
 #define CONFIG_SYS_UBOOT_BASE	\
 	(QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
 
@@ -103,7 +101,6 @@
 /* USDHC */
 #define CONFIG_SYS_FSL_USDHC_NUM	2
 #define CONFIG_SYS_FSL_ESDHC_ADDR	0
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
 /* ENET */
 #define CONFIG_ETHPRIME                 "FEC"
diff --git a/include/configs/vexpress_common.h b/include/configs/vexpress_common.h
index 990f5ed5470..91d50bc4a00 100644
--- a/include/configs/vexpress_common.h
+++ b/include/configs/vexpress_common.h
@@ -109,8 +109,6 @@
 /* Board info register */
 #define SYS_ID				V2M_SYSREGS
 
-#define CONFIG_SYS_L2CACHE_OFF		1
-
 #define SCTL_BASE			V2M_SYSCTL
 #define VEXPRESS_FLASHPROG_FLVPPEN	(1 << 0)
 
diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h
index c42db3686f6..d90c2fa0534 100644
--- a/include/configs/vf610twr.h
+++ b/include/configs/vf610twr.h
@@ -11,8 +11,6 @@
 #include <asm/arch/imx-regs.h>
 #include <linux/stringify.h>
 
-#define CONFIG_SYS_FSL_CLK
-
 /* NAND support */
 
 #ifdef CONFIG_CMD_NAND
diff --git a/include/configs/vinco.h b/include/configs/vinco.h
index 49679312e4c..7bd48820ed3 100644
--- a/include/configs/vinco.h
+++ b/include/configs/vinco.h
@@ -34,13 +34,11 @@
 
 #ifdef CONFIG_CMD_SF
 #define CONFIG_ATMEL_SPI0
-#define CONFIG_SPI_FLASH_STMICRO
 #endif
 
 /* MMC */
 
 #ifdef CONFIG_CMD_MMC
-#define CONFIG_GENERIC_ATMEL_MCI
 #define ATMEL_BASE_MMCI			0xfc000000
 #define CONFIG_SYS_MMC_CLK_OD		500000
 
diff --git a/include/configs/vocore2.h b/include/configs/vocore2.h
index 58888d4caf0..c60da8ac123 100644
--- a/include/configs/vocore2.h
+++ b/include/configs/vocore2.h
@@ -30,7 +30,6 @@
 #define CONFIG_SYS_NS16550_CLK		40000000
 #define CONFIG_SYS_NS16550_REG_SIZE	-4
 #define CONFIG_SYS_NS16550_COM3		0xb0000e00
-#define CONFIG_CONS_INDEX		3
 
 /* RAM */
 
diff --git a/include/configs/warp7.h b/include/configs/warp7.h
index 33eef9016bb..83ee1784ce9 100644
--- a/include/configs/warp7.h
+++ b/include/configs/warp7.h
@@ -16,7 +16,6 @@
 /* MMC Config*/
 #define CONFIG_SYS_FSL_ESDHC_ADDR       USDHC3_BASE_ADDR
 #define CONFIG_SYS_FSL_ESDHC_HAS_DDR_MODE
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
 
 #define CONFIG_DFU_ENV_SETTINGS \
 	"dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \
@@ -40,12 +39,12 @@
 	"fdt_high=0xffffffff\0" \
 	"initrd_high=0xffffffff\0" \
 	"fdt_file=imx7s-warp.dtb\0" \
-	"fdt_addr=" __stringify(CONFIG_SYS_FDT_ADDR)"\0" \
+	"fdt_addr=0x83000000\0" \
 	"fdtovaddr=0x83100000\0" \
 	"boot_fdt=try\0" \
 	"ip_dyn=yes\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"rootpart=" __stringify(CONFIG_WARP7_ROOT_PART) "\0" \
 	"finduuid=part uuid mmc 0:${rootpart} uuid\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
diff --git a/include/configs/work_92105.h b/include/configs/work_92105.h
index a45d3b4547b..a43fd81e45d 100644
--- a/include/configs/work_92105.h
+++ b/include/configs/work_92105.h
@@ -55,7 +55,6 @@
  */
 
 /* driver configuration */
-#define CONFIG_SYS_NAND_SELF_INIT
 #define CONFIG_SYS_MAX_NAND_DEVICE 1
 #define CONFIG_SYS_MAX_NAND_CHIPS 1
 #define CONFIG_SYS_NAND_BASE MLC_NAND_BASE
@@ -64,8 +63,6 @@
  * GPIO
  */
 
-#define CONFIG_LPC32XX_GPIO
-
 /*
  * Environment
  */
diff --git a/include/configs/xea.h b/include/configs/xea.h
index 5b968f0820c..aa48bb92631 100644
--- a/include/configs/xea.h
+++ b/include/configs/xea.h
@@ -29,10 +29,6 @@
 #define CONFIG_SYS_MMCSD_RAW_MODE_ARGS_SECTORS	(SZ_32K / 0x200)
 #define CONFIG_SYS_MMCSD_RAW_MODE_KERNEL_SECTOR	(SZ_1M / 0x200)
 
-#ifndef CONFIG_SPL_BUILD
-#define CONFIG_SPI_FLASH_MTD
-#endif
-
 /* Memory configuration */
 #define PHYS_SDRAM_1			0x40000000	/* Base address */
 #define PHYS_SDRAM_1_SIZE		0x10000000	/* Max 256 MB RAM */
diff --git a/include/configs/xenguest_arm64.h b/include/configs/xenguest_arm64.h
index c5e3d1678d0..408c7b5dd69 100644
--- a/include/configs/xenguest_arm64.h
+++ b/include/configs/xenguest_arm64.h
@@ -11,17 +11,8 @@
 
 #define CONFIG_EXTRA_ENV_SETTINGS
 
-#undef CONFIG_NR_DRAM_BANKS
 #undef CONFIG_SYS_SDRAM_BASE
 
-#define CONFIG_NR_DRAM_BANKS          1
-
-/*
- * This can be any arbitrary address as we are using PIE, but
- * please note, that CONFIG_SYS_TEXT_BASE must match the below.
- */
-#define CONFIG_LNX_KRNL_IMG_TEXT_OFFSET_BASE    CONFIG_SYS_LOAD_ADDR
-
 /* Monitor Command Prompt */
 #define CONFIG_SYS_CBSIZE             1024
 #define CONFIG_SYS_MAXARGS            64
@@ -29,8 +20,6 @@
 #define CONFIG_SYS_PBSIZE             (CONFIG_SYS_CBSIZE + \
 				      sizeof(CONFIG_SYS_PROMPT) + 16)
 
-#define CONFIG_OF_SYSTEM_SETUP
-
 #undef CONFIG_EXTRA_ENV_SETTINGS
 #define CONFIG_EXTRA_ENV_SETTINGS	\
 	"loadimage=ext4load pvblock 0 0x90000000 /boot/Image;\0" \
diff --git a/include/configs/xilinx_versal.h b/include/configs/xilinx_versal.h
index 43486457a45..03539a41b49 100644
--- a/include/configs/xilinx_versal.h
+++ b/include/configs/xilinx_versal.h
@@ -26,8 +26,6 @@
 #endif
 
 /* Serial setup */
-#define CONFIG_CPU_ARMV8
-
 #define CONFIG_SYS_BAUDRATE_TABLE \
 	{ 4800, 9600, 19200, 38400, 57600, 115200 }
 
diff --git a/include/configs/xilinx_zynqmp.h b/include/configs/xilinx_zynqmp.h
index e2148057875..f4b7f305bf7 100644
--- a/include/configs/xilinx_zynqmp.h
+++ b/include/configs/xilinx_zynqmp.h
@@ -26,8 +26,6 @@
 #endif
 
 /* Serial setup */
-#define CONFIG_CPU_ARMV8
-
 #define CONFIG_SYS_BAUDRATE_TABLE \
 	{ 4800, 9600, 19200, 38400, 57600, 115200 }
 
@@ -39,10 +37,6 @@
 # define CONFIG_SYS_MAX_NAND_DEVICE	1
 #endif
 
-#if defined(CONFIG_SPL_BUILD)
-#define CONFIG_ZYNQMP_PSU_INIT_ENABLED
-#endif
-
 /* Miscellaneous configurable options */
 
 #if defined(CONFIG_ZYNQMP_USB)
diff --git a/include/configs/xilinx_zynqmp_r5.h b/include/configs/xilinx_zynqmp_r5.h
index 6d5b81e05e1..3ec99e062df 100644
--- a/include/configs/xilinx_zynqmp_r5.h
+++ b/include/configs/xilinx_zynqmp_r5.h
@@ -8,9 +8,6 @@
 
 #define CONFIG_EXTRA_ENV_SETTINGS
 
-/* CPU clock */
-#define CONFIG_CPU_FREQ_HZ	500000000
-
 /* Serial drivers */
 /* The following table includes the supported baudrates */
 #define CONFIG_SYS_BAUDRATE_TABLE  \
diff --git a/include/configs/xpress.h b/include/configs/xpress.h
index f6645a72940..6d621f24bdd 100644
--- a/include/configs/xpress.h
+++ b/include/configs/xpress.h
@@ -48,8 +48,6 @@
 #define CONFIG_FEC_XCV_TYPE             RMII
 #define CONFIG_ETHPRIME			"FEC"
 
-#define CONFIG_SYS_MMC_IMG_LOAD_PART	1
-
 #define CONFIG_UBOOT_SECTOR_START	0x2
 #define CONFIG_UBOOT_SECTOR_COUNT	0x3fe
 
@@ -64,7 +62,7 @@
 	"boot_fdt=try\0" \
 	"ip_dyn=yes\0" \
 	"mmcdev="__stringify(CONFIG_SYS_MMC_ENV_DEV)"\0" \
-	"mmcpart=" __stringify(CONFIG_SYS_MMC_IMG_LOAD_PART) "\0" \
+	"mmcpart=1\0" \
 	"mmcroot=" CONFIG_MMCROOT " rootwait rw\0" \
 	"mmcautodetect=yes\0" \
 	"mmcargs=setenv bootargs console=${console},${baudrate} " \
diff --git a/include/configs/xtfpga.h b/include/configs/xtfpga.h
index ccc90a66f7d..c8a6e9a61af 100644
--- a/include/configs/xtfpga.h
+++ b/include/configs/xtfpga.h
@@ -22,9 +22,6 @@
 
 #define CONFIG_XTFPGA
 
-/* FPGA CPU freq after init */
-#define CONFIG_SYS_CLK_FREQ		(gd->cpu_clk)
-
 /*===================*/
 /* RAM Layout        */
 /*===================*/
@@ -169,7 +166,7 @@
 #define CONFIG_SYS_NS16550_COM1		IOADDR(0x0D050020) /* Base address */
 
 /* Input clk to NS16550 (in Hz; the SYS_CLK_FREQ is in kHz) */
-#define CONFIG_SYS_NS16550_CLK		CONFIG_SYS_CLK_FREQ
+#define CONFIG_SYS_NS16550_CLK		get_board_sys_clk()
 
 /*======================*/
 /* Ethernet Driver Info */
diff --git a/include/configs/zynq-common.h b/include/configs/zynq-common.h
index 4de2f94b040..88c6490d81c 100644
--- a/include/configs/zynq-common.h
+++ b/include/configs/zynq-common.h
@@ -9,15 +9,9 @@
 #ifndef __CONFIG_ZYNQ_COMMON_H
 #define __CONFIG_ZYNQ_COMMON_H
 
-/* CPU clock */
-#ifndef CONFIG_CPU_FREQ_HZ
-# define CONFIG_CPU_FREQ_HZ	800000000
-#endif
-
 #define CONFIG_REMAKE_ELF
 
 /* Cache options */
-#define CONFIG_SYS_L2CACHE_OFF
 #ifndef CONFIG_SYS_L2CACHE_OFF
 # define CONFIG_SYS_L2_PL310
 # define CONFIG_SYS_PL310_BASE		0xf8f02000
diff --git a/include/faraday/ftwdt010_wdt.h b/include/faraday/ftwdt010_wdt.h
index 20bf6d31252..804907d6455 100644
--- a/include/faraday/ftwdt010_wdt.h
+++ b/include/faraday/ftwdt010_wdt.h
@@ -16,6 +16,8 @@
 #ifndef __FTWDT010_H
 #define __FTWDT010_H
 
+#include <clock_legacy.h>
+
 struct ftwdt010_wdt {
 	unsigned int	wdcounter;	/* Counter Reg		- 0x00 */
 	unsigned int	wdload;		/* Counter Auto Reload Reg - 0x04 */
@@ -82,10 +84,10 @@ struct ftwdt010_wdt {
 
 /*
  * Variable timeout should be set in ms.
- * (CONFIG_SYS_CLK_FREQ/1000) equals 1 ms.
+ * (get_board_sys_clk()/1000) equals 1 ms.
  * WDLOAD = timeout * TIMEOUT_FACTOR.
  */
-#define FTWDT010_TIMEOUT_FACTOR		(CONFIG_SYS_CLK_FREQ / 1000) /* 1 ms */
+#define FTWDT010_TIMEOUT_FACTOR		(get_board_sys_clk() / 1000) /* 1 ms */
 
 void ftwdt010_wdt_reset(void);
 void ftwdt010_wdt_disable(void);
diff --git a/include/mpc85xx.h b/include/mpc85xx.h
index ce6d083effa..2c69a60de63 100644
--- a/include/mpc85xx.h
+++ b/include/mpc85xx.h
@@ -60,8 +60,4 @@ CONFIG_SYS_CCSRBAR_PHYS_LOW and/or CONFIG_SYS_CCSRBAR_PHYS_HIGH instead."
 #define CONFIG_SYS_CCSRBAR_PHYS ((CONFIG_SYS_CCSRBAR_PHYS_HIGH * 1ull) << 32 | \
 				 CONFIG_SYS_CCSRBAR_PHYS_LOW)
 
-#ifndef CONFIG_SYS_IMMR
-#define CONFIG_SYS_IMMR			CONFIG_SYS_CCSRBAR
-#endif
-
 #endif	/* __MPC85xx_H__ */
diff --git a/include/nand.h b/include/nand.h
index 09dbda4e81b..70c1286ccb4 100644
--- a/include/nand.h
+++ b/include/nand.h
@@ -10,22 +10,6 @@
 
 #include <config.h>
 
-/*
- * All boards using a given driver must convert to self-init
- * at the same time, so do it here.  When all drivers are
- * converted, this will go away.
- */
-#ifdef CONFIG_SPL_BUILD
-#if defined(CONFIG_NAND_FSL_ELBC) || defined(CONFIG_NAND_FSL_IFC)
-#define CONFIG_SYS_NAND_SELF_INIT
-#endif
-#else
-#if defined(CONFIG_NAND_FSL_ELBC) || defined(CONFIG_NAND_ATMEL)\
-	|| defined(CONFIG_NAND_FSL_IFC)
-#define CONFIG_SYS_NAND_SELF_INIT
-#endif
-#endif
-
 extern void nand_init(void);
 unsigned long nand_size(void);
 
@@ -34,7 +18,7 @@ unsigned long nand_size(void);
 
 int nand_mtd_to_devnum(struct mtd_info *mtd);
 
-#ifdef CONFIG_SYS_NAND_SELF_INIT
+#if CONFIG_IS_ENABLED(SYS_NAND_SELF_INIT)
 void board_nand_init(void);
 int nand_register(int devnum, struct mtd_info *mtd);
 #else
diff --git a/include/spi_flash.h b/include/spi_flash.h
index 4d4ae89c192..4566feab631 100644
--- a/include/spi_flash.h
+++ b/include/spi_flash.h
@@ -14,20 +14,6 @@
 
 struct udevice;
 
-/* by default ENV use the same parameters than SF command */
-#ifndef CONFIG_ENV_SPI_BUS
-# define CONFIG_ENV_SPI_BUS	CONFIG_SF_DEFAULT_BUS
-#endif
-#ifndef CONFIG_ENV_SPI_CS
-# define CONFIG_ENV_SPI_CS	CONFIG_SF_DEFAULT_CS
-#endif
-#ifndef CONFIG_ENV_SPI_MAX_HZ
-# define CONFIG_ENV_SPI_MAX_HZ	CONFIG_SF_DEFAULT_SPEED
-#endif
-#ifndef CONFIG_ENV_SPI_MODE
-# define CONFIG_ENV_SPI_MODE	CONFIG_SF_DEFAULT_MODE
-#endif
-
 struct spi_slave;
 
 struct dm_spi_flash_ops {
author	Tom Rini <[email protected]>	2021-12-27 17:20:21 -0500
committer	Tom Rini <[email protected]>	2021-12-27 17:20:21 -0500
commit	111a8b57354bb5aff55635502a0cdf74cb63e835 (patch)
tree	cbdb6857df2ae710e4cf3f7103195d39b6e3fd54 /include
parent	bc0abd80b3c2d395a0245d4e1ce4f8f445f79cde (diff)
parent	5e2fd60b97b3a67a9bbcfe8910b59b2b44d1c9a0 (diff)