Merge patch series "Relocate U-Boot in the last bank"

Ilias Apalodimas <[email protected]> says:

There was a discussion recently on the mailing lists regarding our
management of memory above ram_top [0]. The tl;dr is that we have two problems.

The first one is that U-Boot always relocates to the top of the first available
bank unless there's special board code to sidestep that. The second is we don't
successfully deal with devices that can only do 32-bit DMA.

This patch series deals with the first problem by adding a Kconfig option
allowing platforms to relocate to the top of the last discovered bank.

It's worth noting that this is easily testable with QEMU

qemu-system-aarch64 -m 8192 -smp 2 -nographic -cpu cortex-a57 \
    -machine virt,secure=off \
    -bios u-boot.bin \
    -device virtio-rng-pci \
    -drive id=os,if=none,file="$image" \
    -device virtio-blk-device,drive=os \
    -object memory-backend-ram,id=ram0,size=4G \
    -object memory-backend-ram,id=ram1,size=4G \
    -numa node,memdev=ram0 \
    -numa node,memdev=ram1

# RELOC_ADDR_TOP not set
Hit any key to stop autoboot: 0
=> bdinfo
[...]
relocaddr   = 0x000000013f66c000
reloc off   = 0x000000013f66c000
[...]
lmb_dump_all:
 memory.count = 0x1
 memory[0]	[0x40000000-0x23fffffff], 0x200000000 bytes, flags: none
 reserved.count = 0x2
 reserved[0]	[0x13d507000-0x13d509fff], 0x3000 bytes, flags: no-notify, no-overwrite
reserved[1]	[0x13d50aff0-0x23fffffff], 0x102af5010 bytes, flags: no-overwrite
devicetree  = board
[...]
TLB addr    = 0x000000013ffe0000
irq_sp      = 0x000000013e50aff0
sp start    = 0x000000013e50aff0
Early malloc usage: e88 / 2000
=>

# RELOC_ADDR_TOP enabled

=> bdinfo
[...]
relocaddr   = 0x000000023f66c000
reloc off   = 0x000000023f66c000
[...]
lmb_dump_all:
 memory.count = 0x1
 memory[0]	[0x40000000-0x23fffffff], 0x200000000 bytes, flags: none
 reserved.count = 0x2
 reserved[0]	[0x23d507000-0x23d509fff], 0x3000 bytes, flags: no-notify, no-overwrite
 reserved[1]	[0x23d50aff0-0x23fffffff], 0x2af5010 bytes, flags: no-overwrite
devicetree  = board
[...]
TLB addr    = 0x000000023ffe0000
irq_sp      = 0x000000023e50aff0
sp start    = 0x000000023e50aff0
Early malloc usage: e88 / 2000
=>

[0] https://lore.kernel.org/u-boot/CAC_iWjKFAzpj3B_MEW7-dnOrcAV-rfkhXXo8Bv0KgLNP2VJxRA@mail.gmail.com/

Link: https://lore.kernel.org/r/[email protected]

8 files changed, 20 insertions, 16 deletions

diff --git a/include/asm-generic/global_data.h b/include/asm-generic/global_data.h
index ba6a10cf2ad..ad7ebb1bbc9 100644
--- a/include/asm-generic/global_data.h
+++ b/include/asm-generic/global_data.h
@@ -457,6 +457,13 @@ struct global_data {
 	 */
 	struct upl *upl;
 #endif
+	/**
+	 * @dram: array describing DRAM banks (start address and size for each bank)
+	 */
+	struct {			/* RAM configuration */
+		phys_addr_t start;
+		phys_size_t size;
+	} dram[CONFIG_NR_DRAM_BANKS];
 };
 #ifndef DO_DEPS_ONLY
 static_assert(sizeof(struct global_data) == GD_SIZE);
diff --git a/include/asm-generic/u-boot.h b/include/asm-generic/u-boot.h
index 8c619c1b74a..931fe2f3274 100644
--- a/include/asm-generic/u-boot.h
+++ b/include/asm-generic/u-boot.h
@@ -59,10 +59,6 @@ struct bd_info {
 #endif
 	ulong	        bi_arch_number;	/* unique id for this board */
 	ulong	        bi_boot_params;	/* where this board expects params */
-	struct {			/* RAM configuration */
-		phys_addr_t start;
-		phys_size_t size;
-	} bi_dram[CONFIG_NR_DRAM_BANKS];
 };
 
 #endif /* __ASSEMBLY__ */
diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h
index a6aafb51854..36e330887cd 100644
--- a/include/configs/m53menlo.h
+++ b/include/configs/m53menlo.h
@@ -15,9 +15,9 @@
  * Memory configurations
  */
 #define PHYS_SDRAM_1			CSD0_BASE_ADDR
-#define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
+#define PHYS_SDRAM_1_SIZE		(gd->dram[0].size)
 #define PHYS_SDRAM_2			CSD1_BASE_ADDR
-#define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
+#define PHYS_SDRAM_2_SIZE		(gd->dram[1].size)
 #define PHYS_SDRAM_SIZE			(gd->ram_size)
 
 #define CFG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h
index 2bd1426c7d9..e823611d2e4 100644
--- a/include/configs/mx53cx9020.h
+++ b/include/configs/mx53cx9020.h
@@ -51,9 +51,9 @@
 
 /* Physical Memory Map */
 #define PHYS_SDRAM_1			CSD0_BASE_ADDR
-#define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
+#define PHYS_SDRAM_1_SIZE		(gd->dram[0].size)
 #define PHYS_SDRAM_2			CSD1_BASE_ADDR
-#define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
+#define PHYS_SDRAM_2_SIZE		(gd->dram[1].size)
 #define PHYS_SDRAM_SIZE			(gd->ram_size)
 
 #define CFG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h
index 14095b99f03..acd6eb6f8ac 100644
--- a/include/configs/mx53loco.h
+++ b/include/configs/mx53loco.h
@@ -86,9 +86,9 @@
 
 /* Physical Memory Map */
 #define PHYS_SDRAM_1			CSD0_BASE_ADDR
-#define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
+#define PHYS_SDRAM_1_SIZE		(gd->dram[0].size)
 #define PHYS_SDRAM_2			CSD1_BASE_ADDR
-#define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
+#define PHYS_SDRAM_2_SIZE		(gd->dram[1].size)
 #define PHYS_SDRAM_SIZE			(gd->ram_size)
 
 #define CFG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
diff --git a/include/configs/mx53ppd.h b/include/configs/mx53ppd.h
index 3707de254e1..65babf50546 100644
--- a/include/configs/mx53ppd.h
+++ b/include/configs/mx53ppd.h
@@ -81,9 +81,9 @@
 
 /* Physical Memory Map */
 #define PHYS_SDRAM_1			CSD0_BASE_ADDR
-#define PHYS_SDRAM_1_SIZE		(gd->bd->bi_dram[0].size)
+#define PHYS_SDRAM_1_SIZE		(gd->dram[0].size)
 #define PHYS_SDRAM_2			CSD1_BASE_ADDR
-#define PHYS_SDRAM_2_SIZE		(gd->bd->bi_dram[1].size)
+#define PHYS_SDRAM_2_SIZE		(gd->dram[1].size)
 #define PHYS_SDRAM_SIZE			(gd->ram_size)
 
 #define CFG_SYS_SDRAM_BASE		(PHYS_SDRAM_1)
diff --git a/include/fdtdec.h b/include/fdtdec.h
index 46eaa0da63c..51d9f14a9f2 100644
--- a/include/fdtdec.h
+++ b/include/fdtdec.h
@@ -57,6 +57,7 @@ struct fdt_memory {
 };
 
 struct bd_info;
+struct global_data;
 
 /**
  * enum fdt_source_t - indicates where the devicetree came from
@@ -974,7 +975,7 @@ int fdtdec_setup_mem_size_base(void);
 int fdtdec_setup_mem_size_base_lowest(void);
 
 /**
- * fdtdec_setup_memory_banksize() - decode and populate gd->bd->bi_dram
+ * fdtdec_setup_memory_banksize() - decode and populate gd->dram
  *
  * Decode the /memory 'reg' property to determine the address and size of the
  * memory banks. Use this data to populate the global data board info with the
@@ -1256,12 +1257,12 @@ int board_fdt_blob_setup(void **fdtp);
  * @param basep		Returns base address of first memory bank (NULL to
  *			ignore)
  * @param sizep		Returns total memory size (NULL to ignore)
- * @param bd		Updated with the memory bank information (NULL to skip)
+ * @param gd_ptr	Updated with the memory bank information (NULL to skip)
  * Return: 0 if OK, -ve on error
  */
 int fdtdec_decode_ram_size(const void *blob, const char *area, int board_id,
 			   phys_addr_t *basep, phys_size_t *sizep,
-			   struct bd_info *bd);
+			   struct global_data *gd_ptr);
 
 /**
  * fdtdec_get_srcname() - Get the name of where the devicetree comes from
diff --git a/include/init.h b/include/init.h
index c31ebd83b85..23466d3f153 100644
--- a/include/init.h
+++ b/include/init.h
@@ -80,7 +80,7 @@ int dram_init(void);
  * dram_init_banksize() - Set up DRAM bank sizes
  *
  * This can be implemented by boards to set up the DRAM bank information in
- * gd->bd->bi_dram(). It is called just before relocation, after dram_init()
+ * gd->dram[] It is called just before relocation, after dram_init()
  * is called.
  *
  * If this is not provided, a default implementation will try to set up a