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authorMarek Vasut <[email protected]>2024-11-03 00:57:31 +0100
committerTom Rini <[email protected]>2024-11-10 20:21:07 -0600
commit24b28ffc40d464696b909ca5a4e860e09343397b (patch)
treede2b198f929a8b4b1f7497b844736d9875959e3a /include
parent9c25cd563179cf32cf3b119d5ae78ef8348d0335 (diff)
mtd: spi-nor: Fix integer overflow in stacked memories support
The 5d40b3d384dc ("mtd: spi-nor: Add parallel and stacked memories support") adds new SPI bus flags, but also introduces a completely new set of SPI bus flags in another location. The existing flags field is type u8, while the new separate flags are BIT(8) and higher. Use of those new flags triggers integer overflow. Drop the newly introduced flags which were never used anywhere in the code. Move the one remaining flag which was used in the correct place and change it from BIT(8) to BIT(6) so it fits the u8 flags. Fixes: 5d40b3d384dc ("mtd: spi-nor: Add parallel and stacked memories support") Addresses-Coverity-ID: 510804 Extra high-order bits Reported-by: Heinrich Schuchardt <[email protected]> Signed-off-by: Marek Vasut <[email protected]> Reviewed-by: Venkatesh Yadav Abbarapu <[email protected]>
Diffstat (limited to 'include')
-rw-r--r--include/spi.h8
1 files changed, 2 insertions, 6 deletions
diff --git a/include/spi.h b/include/spi.h
index 3a92d02f215..6944773b596 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -41,12 +41,6 @@
#define SPI_3BYTE_MODE 0x0
#define SPI_4BYTE_MODE 0x1
-/* SPI transfer flags */
-#define SPI_XFER_STRIPE (1 << 6)
-#define SPI_XFER_MASK (3 << 8)
-#define SPI_XFER_LOWER (1 << 8)
-#define SPI_XFER_UPPER (2 << 8)
-
/* Max no. of CS supported per spi device */
#define SPI_CS_CNT_MAX 2
@@ -169,6 +163,8 @@ struct spi_slave {
#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
#define SPI_XFER_U_PAGE BIT(4)
#define SPI_XFER_STACKED BIT(5)
+#define SPI_XFER_LOWER BIT(6)
+
/*
* Flag indicating that the spi-controller has multi chip select
* capability and can assert/de-assert more than one chip select