diff options
| author | Stefan Bosch <[email protected]> | 2022-12-18 12:26:47 +0000 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2023-01-02 16:06:08 -0500 |
| commit | 28663622cf0767d0c5f31629ab50e34069bf0267 (patch) | |
| tree | 2cbf4a1055910d1fdff3ef983015ce2be3c81172 /include | |
| parent | 5745de2c9d4beec60ffd6aa74beef9e4ac415ba5 (diff) | |
arm: s5p4418: dm_serial: remove old code / add DEBUG_UART
Remove init of UART-clock and UART-reset in arch_cpu_init(). Add DEBUG_UART
to s5p4418_nanopi2_defconfig.
Signed-off-by: Stefan Bosch <[email protected]>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/s5p4418_nanopi2.h | 8 |
1 files changed, 3 insertions, 5 deletions
diff --git a/include/configs/s5p4418_nanopi2.h b/include/configs/s5p4418_nanopi2.h index 2fa44e65fc1..fec1bfd50eb 100644 --- a/include/configs/s5p4418_nanopi2.h +++ b/include/configs/s5p4418_nanopi2.h @@ -76,11 +76,9 @@ /*----------------------------------------------------------------------- * serial console configuration */ -#define CFG_PL011_CLOCK 50000000 -#define CFG_PL01x_PORTS {(void *)PHY_BASEADDR_UART0, \ - (void *)PHY_BASEADDR_UART1, \ - (void *)PHY_BASEADDR_UART2, \ - (void *)PHY_BASEADDR_UART3} + +/* 150MHz is the clock rate set by SPL (uart0) */ +#define CFG_PL011_CLOCK 150000000 /*----------------------------------------------------------------------- * BACKLIGHT |