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authorJoseph Chen <[email protected]>2021-06-02 15:58:25 +0800
committerKever Yang <[email protected]>2021-06-18 14:36:24 +0800
commit2a950e3ba5063a6c23bdcde2d5224ffb9abb5a93 (patch)
treeb4002647ce28ff8b227568125dc69b913fc00d2c /include
parent2d46775287e3e421e5c1369ddc04626ccf52c23d (diff)
rockchip: Add rk3568 architecture core
RK3568 is a high-performance and low power quad-core application processor designed for personal mobile internet device and AIoT equipments. Signed-off-by: Joseph Chen <[email protected]> Reviewed-by: Kever Yang <[email protected]>
Diffstat (limited to 'include')
-rw-r--r--include/configs/rk3568_common.h43
1 files changed, 43 insertions, 0 deletions
diff --git a/include/configs/rk3568_common.h b/include/configs/rk3568_common.h
new file mode 100644
index 00000000000..b6568917ea8
--- /dev/null
+++ b/include/configs/rk3568_common.h
@@ -0,0 +1,43 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * (C) Copyright 2021 Rockchip Electronics Co., Ltd
+ */
+
+#ifndef __CONFIG_RK3568_COMMON_H
+#define __CONFIG_RK3568_COMMON_H
+
+#include "rockchip-common.h"
+
+#define CONFIG_SYS_CBSIZE 1024
+#define CONFIG_SKIP_LOWLEVEL_INIT
+
+#define COUNTER_FREQUENCY 24000000
+#define CONFIG_ROCKCHIP_STIMER_BASE 0xfdd1c020
+
+#define CONFIG_IRAM_BASE 0xfdcc0000
+
+#define CONFIG_SYS_INIT_SP_ADDR 0x00c00000
+#define CONFIG_SYS_LOAD_ADDR 0x00c00800
+#define CONFIG_SYS_BOOTM_LEN (64 << 20) /* 64M */
+
+#define CONFIG_SYS_SDRAM_BASE 0
+#define SDRAM_MAX_SIZE 0xf0000000
+
+#ifndef CONFIG_SPL_BUILD
+#define ENV_MEM_LAYOUT_SETTINGS \
+ "scriptaddr=0x00c00000\0" \
+ "pxefile_addr_r=0x00e00000\0" \
+ "fdt_addr_r=0x0a100000\0" \
+ "kernel_addr_r=0x02080000\0" \
+ "ramdisk_addr_r=0x0a200000\0"
+
+#include <config_distro_bootcmd.h>
+#define CONFIG_EXTRA_ENV_SETTINGS \
+ ENV_MEM_LAYOUT_SETTINGS \
+ "fdtfile=" CONFIG_DEFAULT_FDT_FILE "\0" \
+ "partitions=" PARTS_DEFAULT \
+ ROCKCHIP_DEVICE_SETTINGS \
+ BOOTENV
+#endif
+
+#endif