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authorTom Rini <[email protected]>2024-02-08 09:37:16 -0500
committerTom Rini <[email protected]>2024-02-08 09:37:16 -0500
commit2b51069b7c5a8331ed4a6eb641e66466f062b06a (patch)
treea756d71839bccea091f809891ad86ab3c0192abe /include
parenta7fb2f57ad5039e287ffbffe30a6af0729aaa721 (diff)
parent8dcf1df48dff339b172d1bce2a38a965ee4aafca (diff)
Merge tag 'u-boot-imx-master-20240208' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
- Add USB support for phycore-imx8mp - Fix environment corruption, reset on mx6sabresd - Print reset cause on imx8 - Extend mkimage to support generating an image for i.MXRT FlexSPI - Add new apalis and colibri variants - Add support for phyBOARD-Segin-i.MX93 support - Fix when FEC is primarily used instead of EQOS on i.MX93.
Diffstat (limited to 'include')
-rw-r--r--include/configs/phycore_imx8mp.h5
-rw-r--r--include/configs/phycore_imx93.h28
-rw-r--r--include/firmware/imx/sci/sci.h6
-rw-r--r--include/imximage.h42
4 files changed, 62 insertions, 19 deletions
diff --git a/include/configs/phycore_imx8mp.h b/include/configs/phycore_imx8mp.h
index d79d364c8e2..11a17be7fe1 100644
--- a/include/configs/phycore_imx8mp.h
+++ b/include/configs/phycore_imx8mp.h
@@ -19,6 +19,11 @@
"fdt_addr=0x48000000\0" \
"fdt_file=" CONFIG_DEFAULT_FDT_FILE "\0" \
"ip_dyn=yes\0" \
+ "dofastboot=0\0" \
+ "fastboot_raw_partition_bootloader=64 8128\0" \
+ "fastboot_raw_partition_all=0 4194304\0" \
+ "emmc_dev=2\0" \
+ "sd_dev=1\0" \
"mmcdev=" __stringify(CONFIG_SYS_MMC_ENV_DEV) "\0" \
"mmcpart=1\0" \
"mmcroot=2\0" \
diff --git a/include/configs/phycore_imx93.h b/include/configs/phycore_imx93.h
new file mode 100644
index 00000000000..07364dff403
--- /dev/null
+++ b/include/configs/phycore_imx93.h
@@ -0,0 +1,28 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright 2022 NXP
+ * Copyright (C) 2023 PHYTEC Messtechnik GmbH
+ * Christoph Stoidner <[email protected]>
+ * Copyright (C) 2024 Mathieu Othacehe <[email protected]>
+ */
+
+#ifndef __PHYCORE_IMX93_H
+#define __PHYCORE_IMX93_H
+
+#include <linux/sizes.h>
+#include <asm/arch/imx-regs.h>
+
+#define CFG_SYS_UBOOT_BASE \
+ (QSPI0_AMBA_BASE + CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR * 512)
+
+#define CFG_SYS_INIT_RAM_ADDR 0x80000000
+#define CFG_SYS_INIT_RAM_SIZE 0x200000
+
+#define CFG_SYS_SDRAM_BASE 0x80000000
+#define PHYS_SDRAM 0x80000000
+#define PHYS_SDRAM_SIZE 0x80000000
+
+/* Using ULP WDOG for reset */
+#define WDOG_BASE_ADDR WDG3_BASE_ADDR
+
+#endif /* __PHYCORE_IMX93_H */
diff --git a/include/firmware/imx/sci/sci.h b/include/firmware/imx/sci/sci.h
index f832982b3de..7d8499f070a 100644
--- a/include/firmware/imx/sci/sci.h
+++ b/include/firmware/imx/sci/sci.h
@@ -75,6 +75,7 @@ int sc_pm_set_clock_parent(sc_ipc_t ipc, sc_rsrc_t resource, sc_pm_clk_t clk,
int sc_pm_cpu_start(sc_ipc_t ipc, sc_rsrc_t resource, sc_bool_t enable,
sc_faddr_t address);
void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type);
+int sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason);
sc_bool_t sc_pm_is_partition_started(sc_ipc_t ipc, sc_rm_pt_t pt);
int sc_pm_resource_reset(sc_ipc_t ipc, sc_rsrc_t resource);
@@ -385,6 +386,11 @@ static inline void sc_pm_reboot(sc_ipc_t ipc, sc_pm_reset_type_t type)
{
}
+static inline int sc_pm_reset_reason(sc_ipc_t ipc, sc_pm_reset_reason_t *reason)
+{
+ return -EOPNOTSUPP;
+}
+
static inline int sc_seco_v2x_build_info(sc_ipc_t ipc, u32 *version, u32 *commit)
{
return -EOPNOTSUPP;
diff --git a/include/imximage.h b/include/imximage.h
index c1ecc0b7cb0..a951699d0a6 100644
--- a/include/imximage.h
+++ b/include/imximage.h
@@ -210,33 +210,37 @@ typedef struct {
uint8_t datasetup;
uint8_t coladdrwidth;
uint8_t devcfgenable;
- uint8_t reserved_2[3];
+ uint8_t deviceModeType;
+ uint16_t waitTimeCfgCommands;
uint8_t devmodeseq[4];
- uint8_t devmodearg[4];
+ uint32_t devmodearg;
uint8_t cmd_enable;
- uint8_t reserved_3[3];
+ uint8_t configModeType[3];
uint8_t cmd_seq[16] ;
uint8_t cmd_arg[16];
- uint8_t controllermisc[4];
+ uint32_t controllermisc;
uint8_t dev_type;
uint8_t sflash_pad;
uint8_t serial_clk;
- uint8_t lut_custom ;
- uint8_t reserved_4[8];
- uint8_t sflashA1[4];
- uint8_t sflashA2[4];
- uint8_t sflashB1[4];
- uint8_t sflashB2[4];
- uint8_t cspadover[4];
- uint8_t sclkpadover[4];
- uint8_t datapadover[4];
- uint8_t dqspadover[4];
- uint8_t timeout[4];
- uint8_t commandInt[4];
- uint8_t datavalid[4];
- uint8_t busyoffset[2];
- uint8_t busybitpolarity[2];
+ uint8_t lut_custom;
+ uint8_t reserved_2[8];
+ uint32_t sflashA1;
+ uint32_t sflashA2;
+ uint32_t sflashB1;
+ uint32_t sflashB2;
+ uint32_t cspadover;
+ uint32_t sclkpadover;
+ uint32_t datapadover;
+ uint32_t dqspadover;
+ uint32_t timeout;
+ uint32_t commandInt;
+ uint16_t datavalid[2];
+ uint16_t busyoffset;
+ uint16_t busybitpolarity;
uint8_t lut[256];
+ uint8_t lutCustomSeq[48];
+ uint8_t reserved_3[16];
+
} __attribute__((packed)) fspi_conf;
typedef void (*set_dcd_val_t)(struct imx_header *imxhdr,