diff options
| author | Marek Vasut <[email protected]> | 2018-08-18 16:00:31 +0200 |
|---|---|---|
| committer | Marek Vasut <[email protected]> | 2018-08-24 12:05:20 +0200 |
| commit | 331c37221057e6a1291b6e14d9f033a7a90051f1 (patch) | |
| tree | 8c3e682027c195195aa513165d1bef60ed5a1e2a /include | |
| parent | cca9af63a32220e0a270ac62fa9c46a0ed4ca0ce (diff) | |
ARM: socfpga: Convert Arria10 to timer framework
Switch the Arria10 from ad-hoc hardcoded timer to timer framework
and the DW APB timer driver. This allows the A10 to extract timer
information, like timer rate, from clock framework and thus DT
instead of having it hardcoded in U-Boot configuration files.
Signed-off-by: Marek Vasut <[email protected]>
Cc: Chin Liang See <[email protected]>
Cc: Dinh Nguyen <[email protected]>
Cc: Ley Foon Tan <[email protected]>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/socfpga_common.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/socfpga_common.h b/include/configs/socfpga_common.h index 440a918fc7c..2330143cf1c 100644 --- a/include/configs/socfpga_common.h +++ b/include/configs/socfpga_common.h @@ -86,11 +86,13 @@ /* * L4 OSC1 Timer 0 */ +#ifndef CONFIG_TIMER /* This timer uses eosc1, whose clock frequency is fixed at any condition. */ #define CONFIG_SYS_TIMERBASE SOCFPGA_OSC1TIMER0_ADDRESS #define CONFIG_SYS_TIMER_COUNTS_DOWN #define CONFIG_SYS_TIMER_COUNTER (CONFIG_SYS_TIMERBASE + 0x4) #define CONFIG_SYS_TIMER_RATE 25000000 +#endif /* * L4 Watchdog |