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authorVenkatesh Yadav Abbarapu <[email protected]>2024-09-26 10:25:05 +0530
committerTom Rini <[email protected]>2024-10-09 09:01:54 -0600
commit34da258bb0465de4bf44dc8949a9536cc06bf725 (patch)
tree7aa92b21cd25503e3ad8ed496a38a3ef080546c1 /include
parentc480ec2c45b221b2044c6268c9773e78fa47f305 (diff)
spi: spi-uclass: Read chipselect and restrict capabilities
Read chipselect properties from DT which are populated using 'reg' property and save it in plat->cs[] array for later use. Also read multi chipselect capability which is used for parallel-memories and return errors if they are passed on using DT but driver is not capable of handling it. Signed-off-by: Ashok Reddy Soma <[email protected]> Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Diffstat (limited to 'include')
-rw-r--r--include/spi.h8
1 files changed, 7 insertions, 1 deletions
diff --git a/include/spi.h b/include/spi.h
index 6e8e0cce7f2..b7148864e78 100644
--- a/include/spi.h
+++ b/include/spi.h
@@ -80,7 +80,7 @@ struct dm_spi_bus {
* @mode: SPI mode to use for this device (see SPI mode flags)
*/
struct dm_spi_slave_plat {
- unsigned int cs;
+ unsigned int cs[SPI_CS_CNT_MAX];
uint max_hz;
uint mode;
};
@@ -166,6 +166,12 @@ struct spi_slave {
#define SPI_XFER_ONCE (SPI_XFER_BEGIN | SPI_XFER_END)
#define SPI_XFER_U_PAGE BIT(4)
#define SPI_XFER_STACKED BIT(5)
+ /*
+ * Flag indicating that the spi-controller has multi chip select
+ * capability and can assert/de-assert more than one chip select
+ * at once.
+ */
+ bool multi_cs_cap;
};
/**