diff options
| author | Tom Rini <[email protected]> | 2024-02-19 08:55:17 -0500 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2024-02-19 08:55:17 -0500 |
| commit | 3e6f2a94bfc25f1782ce2d45db27f47ec781feb1 (patch) | |
| tree | 3a2d46267b2ab262519b2d30a69ec3a569be173f /include | |
| parent | e4013bcb10f604ec1dfe955634d57e1fc336b15f (diff) | |
| parent | 0cfc2e9225fb682a1a5b3e5d49af8ebf8d893cef (diff) | |
Merge tag 'u-boot-imx-master-20240219' of https://gitlab.denx.de/u-boot/custodians/u-boot-imx
CI: https://source.denx.de/u-boot/custodians/u-boot-imx/-/pipelines/19683
- Convert msc_sm2s_imx8mp to DM_SERIAL.
- Make Ethernel functional on msc_sm2s_imx8mp.
- General improvements for msc_sm2s_imx8mp.
- Add suport for the Sielaff i.MX6 Solo board.
- Update GE HealthCare maitainers' e-mail addresses.
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/imx6dl-sielaff.h | 25 | ||||
| -rw-r--r-- | include/configs/msc_sm2s_imx8mp.h | 2 |
2 files changed, 25 insertions, 2 deletions
diff --git a/include/configs/imx6dl-sielaff.h b/include/configs/imx6dl-sielaff.h new file mode 100644 index 00000000000..df074135079 --- /dev/null +++ b/include/configs/imx6dl-sielaff.h @@ -0,0 +1,25 @@ +/* SPDX-License-Identifier: GPL-2.0+ */ +/* + * Copyright (C) 2022 Kontron Electronics GmbH + */ +#ifndef __MX6SSIELAFF_CONFIG_H +#define __MX6SSIELAFF_CONFIG_H + +#include <asm/arch/imx-regs.h> +#include <linux/sizes.h> +#include "mx6_common.h" + +#define CFG_MXC_UART_BASE UART2_BASE + +#define PHYS_SDRAM_SIZE SZ_512M +#define PHYS_SDRAM MMDC0_ARB_BASE_ADDR +#define CFG_SYS_SDRAM_BASE PHYS_SDRAM +#define CFG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR +#define CFG_SYS_INIT_RAM_SIZE IRAM_SIZE + +#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR +#define CFG_SYS_FSL_USDHC_NUM 1 + +#define CFG_SYS_NAND_BASE 0x40000000 + +#endif /* __MX6SSIELAFF_CONFIG_H */ diff --git a/include/configs/msc_sm2s_imx8mp.h b/include/configs/msc_sm2s_imx8mp.h index c1c1fd5a784..3c7d96cb3c0 100644 --- a/include/configs/msc_sm2s_imx8mp.h +++ b/include/configs/msc_sm2s_imx8mp.h @@ -55,8 +55,6 @@ #define PHYS_SDRAM_2 0xc0000000 #define PHYS_SDRAM_2_SIZE 0x0 -#define CFG_MXC_UART_BASE UART2_BASE_ADDR - #define CFG_SYS_FSL_USDHC_NUM 2 #define CFG_SYS_FSL_ESDHC_ADDR 0 |