diff options
| author | jinghua <[email protected]> | 2017-04-24 15:51:03 +0800 |
|---|---|---|
| committer | Stefan Roese <[email protected]> | 2021-04-29 07:45:23 +0200 |
| commit | 4568e2041c9fb6288f841bfb63474aecc1560af9 (patch) | |
| tree | d5e0e71cb33d2d69ffc60a59bd593bff6f848723 /include | |
| parent | 1c817c27e66fb17448a71f59fc70b182f0795ce0 (diff) | |
phy: marvell: add comphy type PHY_TYPE_USB3
- For some Marvell SoCs, like armada-3700, there are both
USB host and device controller, but on PHY level the
configuration is the same.
- The new type supports both USB device and USB host
- This patch is cherry-picked from u-boot-2015 as-is.
Change-Id: I01262027edd8ec23391cff6fb409b3009aedfbb9
Signed-off-by: jinghua <[email protected]>
Signed-off-by: Ken Ma <[email protected]>
Reviewed-by: Igal Liberman <[email protected]>
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/comphy/comphy_data.h | 25 |
1 files changed, 13 insertions, 12 deletions
diff --git a/include/dt-bindings/comphy/comphy_data.h b/include/dt-bindings/comphy/comphy_data.h index 4f7e2821b8e..08544fa758b 100644 --- a/include/dt-bindings/comphy/comphy_data.h +++ b/include/dt-bindings/comphy/comphy_data.h @@ -33,18 +33,19 @@ #define PHY_TYPE_SGMII2 11 #define PHY_TYPE_SGMII3 12 #define PHY_TYPE_QSGMII 13 -#define PHY_TYPE_USB3_HOST0 14 -#define PHY_TYPE_USB3_HOST1 15 -#define PHY_TYPE_USB3_DEVICE 16 -#define PHY_TYPE_XAUI0 17 -#define PHY_TYPE_XAUI1 18 -#define PHY_TYPE_XAUI2 19 -#define PHY_TYPE_XAUI3 20 -#define PHY_TYPE_RXAUI0 21 -#define PHY_TYPE_RXAUI1 22 -#define PHY_TYPE_SFI 23 -#define PHY_TYPE_IGNORE 24 -#define PHY_TYPE_MAX 25 +#define PHY_TYPE_USB3 14 +#define PHY_TYPE_USB3_HOST0 15 +#define PHY_TYPE_USB3_HOST1 16 +#define PHY_TYPE_USB3_DEVICE 17 +#define PHY_TYPE_XAUI0 18 +#define PHY_TYPE_XAUI1 19 +#define PHY_TYPE_XAUI2 20 +#define PHY_TYPE_XAUI3 21 +#define PHY_TYPE_RXAUI0 22 +#define PHY_TYPE_RXAUI1 23 +#define PHY_TYPE_SFI 24 +#define PHY_TYPE_IGNORE 25 +#define PHY_TYPE_MAX 26 #define PHY_TYPE_INVALID 0xff #define PHY_POLARITY_NO_INVERT 0 |