diff options
| author | Tom Rini <[email protected]> | 2022-09-06 09:01:39 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2022-09-06 09:01:39 -0400 |
| commit | 59c51fa4abbca41d2a4d60c0fe4d8f05fc83fb46 (patch) | |
| tree | d172fdf739d595a9fd7a6a10abb53aec0bee1a2f /include | |
| parent | 166d2693dd3447ffa18112611c85ee4bb37ffa4b (diff) | |
| parent | 4a98207b2335b7108e964b831dc92f0333346c87 (diff) | |
Merge https://source.denx.de/u-boot/custodians/u-boot-riscv
Diffstat (limited to 'include')
| -rw-r--r-- | include/dt-bindings/clock/sifive-fu740-prci.h | 25 |
1 files changed, 12 insertions, 13 deletions
diff --git a/include/dt-bindings/clock/sifive-fu740-prci.h b/include/dt-bindings/clock/sifive-fu740-prci.h index c1224783c08..672bdadbf6c 100644 --- a/include/dt-bindings/clock/sifive-fu740-prci.h +++ b/include/dt-bindings/clock/sifive-fu740-prci.h @@ -1,10 +1,9 @@ -/* SPDX-License-Identifier: GPL-2.0 OR MIT */ +/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */ /* - * Copyright (C) 2020-2021 SiFive, Inc. + * Copyright (C) 2019 SiFive, Inc. * Wesley Terpstra * Paul Walmsley * Zong Li - * Pragnesh Patel */ #ifndef __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H @@ -12,14 +11,14 @@ /* Clock indexes for use by Device Tree data and the PRCI driver */ -#define PRCI_CLK_COREPLL 0 -#define PRCI_CLK_DDRPLL 1 -#define PRCI_CLK_GEMGXLPLL 2 -#define PRCI_CLK_DVFSCOREPLL 3 -#define PRCI_CLK_HFPCLKPLL 4 -#define PRCI_CLK_CLTXPLL 5 -#define PRCI_CLK_TLCLK 6 -#define PRCI_CLK_PCLK 7 -#define PRCI_CLK_PCIEAUX 8 +#define FU740_PRCI_CLK_COREPLL 0 +#define FU740_PRCI_CLK_DDRPLL 1 +#define FU740_PRCI_CLK_GEMGXLPLL 2 +#define FU740_PRCI_CLK_DVFSCOREPLL 3 +#define FU740_PRCI_CLK_HFPCLKPLL 4 +#define FU740_PRCI_CLK_CLTXPLL 5 +#define FU740_PRCI_CLK_TLCLK 6 +#define FU740_PRCI_CLK_PCLK 7 +#define FU740_PRCI_CLK_PCIE_AUX 8 -#endif +#endif /* __DT_BINDINGS_CLOCK_SIFIVE_FU740_PRCI_H */ |