diff options
| author | Venkatesh Yadav Abbarapu <[email protected]> | 2025-03-20 10:13:24 +0100 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2025-04-16 13:42:06 +0200 |
| commit | 5b8d6dcf7ce1b9629cec02e8d17db530776de5b4 (patch) | |
| tree | bc9ef54871690897dbd9cab6f5163795e6fa7f34 /include | |
| parent | cad8f6a506f4f66669a58f74428c36d8f1bfe4d4 (diff) | |
ufs: amd-versal2: Use raw read/write for SLCR/CACHE registers
Update the firmware driver UFS APIs zynqmp_pm_ufs_* to directly
read/write to the pmc_iou_slcr and efuse_cache registers. Replace
these raw reads/writes with the xilinx_pm_request() API with the
correct arguments once the PM related changes are done.
Signed-off-by: Venkatesh Yadav Abbarapu <[email protected]>
Signed-off-by: Michal Simek <[email protected]>
Link: https://lore.kernel.org/r/ee2d1ad2e07e96f1948ab6ffe8f3c50a3b8f9be9.1742462001.git.michal.simek@amd.com
Diffstat (limited to 'include')
| -rw-r--r-- | include/zynqmp_firmware.h | 4 |
1 files changed, 4 insertions, 0 deletions
diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index 82781dfd16b..dc06abc52fc 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -458,6 +458,10 @@ int zynqmp_mmio_read(const u32 address, u32 *value); int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value); int zynqmp_pm_feature(const u32 api_id); u32 zynqmp_pm_get_bootmode_reg(void); +int zynqmp_pm_ufs_get_txrx_cfgrdy(u32 *value); +int zynqmp_pm_ufs_sram_csr_read(u32 *value); +int zynqmp_pm_ufs_sram_csr_write(u32 *value); +int zynqmp_pm_ufs_cal_reg(u32 *value); u32 zynqmp_pm_get_pmc_multi_boot_reg(void); /* Type of Config Object */ |