Merge patch series "arm: airoha: add support for en7523 based boards"

Mikhail Kshevetskiy <[email protected]> says:

This patch series adds basic support for the boards based on Airoha
EN7523/EN7529/EN7562 SoCs. Due to ATF restrictions these boards are
able to run 32-bit OS only.

This patch series adds support for the following hardware:
 * console UART
 * ethernet controller/switch
 * spinand flash (in non-dma mode)

The following issues may be expected:
 * Extra slow UBI attaching in U-Boot (up to 20 sec with fastmap enabled).
   This is caused by the lack of DMA support in the U-Boot airoha-snfi driver.
 * Linux airoha-snfi driver in some cases might damage you flash data
   (see: https://lore.kernel.org/lkml/[email protected]/)
 * Latest linux kernel is recommended to properly support flashes
   with more than one plane per lun
   (see: https://lore.kernel.org/lkml/[email protected]/)
 * It's NOT recommended to use flashes working in continuous mode because
   U-Boot airoha-snfi driver does not support such flashes properly.

The patches was tested on the board:
 - SoC: Airoha EN7562
 - RAM: 512 MB
 - SPI NAND: 4 Gbit, made by Toshiba
 - Linux boot: was NOT tested

The U-Boot was chain-loaded from the running U-Boot. Airoha ATF-2.3 does
not allow easily chain-loading of U-Boot from U-Boot, so a special FIT
image (mimic linux kernel) was created

1) Create u-boot.its file with the following contents:

=== cut here ===
/dts-v1/;

/ {
	description = "ARM OpenWrt FIT (Flattened Image Tree)";
	#address-cells = <1>;

	images {
		u-boot-ram {
			description = "OpenWrt U-Boot RAM image";
			data = /incbin/("u-boot.bin.lzma");
			type = "kernel";
			arch = "arm";
			os = "linux";
			compression = "lzma";
			load = <0x81e00000>;
			entry = <0x81e00000>;
			hash@1 {
				algo = "crc32";
			};
			hash@2 {
				algo = "sha1";
			};
		};

		fdt-1 {
			description = "OpenWrt device tree blob";

			data = /incbin/("dts/upstream/src/arm/airoha/en7523-evb.dtb");
			type = "flat_dt";

			arch = "arm";
			compression = "none";
			hash@1 {
				algo = "crc32";
			};
			hash@2 {
				algo = "sha1";
			};
		};
	};

	configurations {
		default = "config-ram-uboot";
		config-ram-uboot {
			description = "OpenWrt RAM U-Boot";
			kernel = "u-boot-ram";
			fdt = "fdt-1";
		};
	};
};
==================

2) Create u-boot.itb image to chain-load new u-boot from the old one

  lzma_alone e u-boot.bin u-boot.bin.lzma
  mkimage -f u-boot.its u-boot.itb

3) Load new u-boot from the old one

  U-Boot> tftpboot u-boot.itb && bootm

Link: https://lore.kernel.org/r/[email protected]

2 files changed, 82 insertions, 0 deletions

diff --git a/include/configs/en7523.h b/include/configs/en7523.h
new file mode 100644
index 00000000000..2d27b3626ae
--- /dev/null
+++ b/include/configs/en7523.h
@@ -0,0 +1,21 @@
+/* SPDX-License-Identifier: GPL-2.0 */
+/*
+ * Configuration for Airoha EN7523
+ *
+ * Author: Mikhail Kshevetskiy <[email protected]>
+ */
+
+#ifndef __EN7523_H
+#define __EN7523_H
+
+#include <linux/sizes.h>
+
+#define CFG_SYS_UBOOT_BASE		CONFIG_TEXT_BASE
+
+#define CFG_SYS_INIT_RAM_ADDR           CONFIG_TEXT_BASE
+#define CFG_SYS_INIT_RAM_SIZE           SZ_2M
+
+/* DRAM */
+#define CFG_SYS_SDRAM_BASE		0x80000000
+
+#endif
diff --git a/include/dt-bindings/reset/airoha,en7523-reset.h b/include/dt-bindings/reset/airoha,en7523-reset.h
new file mode 100644
index 00000000000..bb0a28673d6
--- /dev/null
+++ b/include/dt-bindings/reset/airoha,en7523-reset.h
@@ -0,0 +1,61 @@
+/* SPDX-License-Identifier: GPL-2.0-only OR BSD-2-Clause */
+/*
+ * Copyright (C) 2024 iopsys Software Solutions AB.
+ * Copyright (C) 2025 Genexis AB.
+ *
+ * Author: Mikhail Kshevetskiy <[email protected]>
+ *
+ * based on
+ *   dts/upstream/include/dt-bindings/reset/airoha,en7581-reset.h
+ * by Lorenzo Bianconi <[email protected]>
+ */
+
+#ifndef __DT_BINDINGS_RESET_CONTROLLER_AIROHA_EN7523_H_
+#define __DT_BINDINGS_RESET_CONTROLLER_AIROHA_EN7523_H_
+
+/* RST_CTRL2 */
+#define EN7523_XPON_PHY_RST		 0
+#define EN7523_XSI_MAC_RST		 1
+#define EN7523_XSI_PHY_RST		 2
+#define EN7523_NPU_RST			 3
+#define EN7523_I2S_RST			 4
+#define EN7523_TRNG_RST			 5
+#define EN7523_TRNG_MSTART_RST		 6
+#define EN7523_DUAL_HSI0_RST		 7
+#define EN7523_DUAL_HSI1_RST		 8
+#define EN7523_HSI_RST			 9
+#define EN7523_DUAL_HSI0_MAC_RST	10
+#define EN7523_DUAL_HSI1_MAC_RST	11
+#define EN7523_HSI_MAC_RST		12
+#define EN7523_WDMA_RST			13
+#define EN7523_WOE0_RST			14
+#define EN7523_WOE1_RST			15
+#define EN7523_HSDMA_RST		16
+#define EN7523_I2C2RBUS_RST		17
+#define EN7523_TDMA_RST			18
+/* RST_CTRL1 */
+#define EN7523_PCM1_ZSI_ISI_RST		19
+#define EN7523_FE_PDMA_RST		20
+#define EN7523_FE_QDMA_RST		21
+#define EN7523_PCM_SPIWP_RST		22
+#define EN7523_CRYPTO_RST		23
+#define EN7523_TIMER_RST		24
+#define EN7523_PCM1_RST			25
+#define EN7523_UART_RST			26
+#define EN7523_GPIO_RST			27
+#define EN7523_GDMA_RST			28
+#define EN7523_I2C_MASTER_RST		29
+#define EN7523_PCM2_ZSI_ISI_RST		30
+#define EN7523_SFC_RST			31
+#define EN7523_UART2_RST		32
+#define EN7523_GDMP_RST			33
+#define EN7523_FE_RST			34
+#define EN7523_USB_HOST_P0_RST		35
+#define EN7523_GSW_RST			36
+#define EN7523_SFC2_PCM_RST		37
+#define EN7523_PCIE0_RST		38
+#define EN7523_PCIE1_RST		39
+#define EN7523_PCIE_HB_RST		40
+#define EN7523_XPON_MAC_RST		41
+
+#endif /* __DT_BINDINGS_RESET_CONTROLLER_AIROHA_EN7523_H_ */