diff options
| author | Michal Simek <[email protected]> | 2026-07-24 07:25:13 +0200 |
|---|---|---|
| committer | Michal Simek <[email protected]> | 2026-08-12 06:55:14 +0200 |
| commit | 661b6e44a446953b472679345ced92a2bb68c4f9 (patch) | |
| tree | f9711d0863fa1f04f055a4f0be5edde1e139d9e4 /include | |
| parent | 63c228d0a0efd89fd808cb1286238f5628db3769 (diff) | |
xilinx: versal2: Add PM UFS firmware interface
Add firmware interface for UFS access but also keep IO interface when
firmware is not enabled.
Signed-off-by: Michal Simek <[email protected]>
Link: https://patch.msgid.link/6419fe4f6f1f451aee624c7762b7aa690d50e498.1784870711.git.michal.simek@amd.com
Diffstat (limited to 'include')
| -rw-r--r-- | include/zynqmp_firmware.h | 13 |
1 files changed, 8 insertions, 5 deletions
diff --git a/include/zynqmp_firmware.h b/include/zynqmp_firmware.h index 0e545e3db1b..f753a67ac27 100644 --- a/include/zynqmp_firmware.h +++ b/include/zynqmp_firmware.h @@ -465,10 +465,6 @@ int zynqmp_mmio_read(const u32 address, u32 *value); int zynqmp_mmio_write(const u32 address, const u32 mask, const u32 value); int zynqmp_pm_feature(const u32 api_id); u32 zynqmp_pm_get_bootmode_reg(void); -int zynqmp_pm_ufs_get_txrx_cfgrdy(u32 *value); -int zynqmp_pm_ufs_sram_csr_read(u32 *value); -int zynqmp_pm_ufs_sram_csr_write(u32 *value); -int zynqmp_pm_ufs_cal_reg(u32 *value); u32 zynqmp_pm_get_pmc_multi_boot_reg(void); u32 zynqmp_pm_get_pmc_global_pggs_reg(u32 reg_addr); @@ -535,7 +531,14 @@ extern smc_call_handler_t __data smc_call_handler; #define PM_DEV_OSPI (0x1822402aU) -#define PM_REG_PGGS3 0x30004003 +#define PM_REGNODE_PMC_IOU_SLCR 0x30000002 +#define PM_REGNODE_EFUSE_CACHE 0x30000003 +#define PM_REG_PGGS3 0x30004003 + +#define SRAM_CSR_OFFSET 0x104C +#define TXRX_CFGRDY_OFFSET 0x1054 +#define UFS_CAL_1_OFFSET 0xBE8 + #define PMC_GLOBAL_PGGS3_REG_NODE 0x1824C005 #endif /* _ZYNQMP_FIRMWARE_H_ */ |