diff options
| author | Tom Rini <[email protected]> | 2022-10-28 20:27:13 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2022-11-10 10:08:55 -0500 |
| commit | 6cc04547cb3bbd3a3d78947f200acbae19e3c67f (patch) | |
| tree | 518a634e223bfb02d08ca359331a4ec08c20513c /include | |
| parent | 5155207ae1a0797a99c0a5f4e99741960ff04697 (diff) | |
global: Migrate CONFIG_SYS_FSL* symbols to the CFG_SYS namespace
Migrate all of COFIG_SYS_FSL* to the CFG_SYS namespace.
Signed-off-by: Tom Rini <[email protected]>
Reviewed-by: Simon Glass <[email protected]>
Diffstat (limited to 'include')
94 files changed, 165 insertions, 165 deletions
diff --git a/include/configs/MPC837XERDB.h b/include/configs/MPC837XERDB.h index 9baab9dedb3..bb93c287441 100644 --- a/include/configs/MPC837XERDB.h +++ b/include/configs/MPC837XERDB.h @@ -216,7 +216,7 @@ #ifdef CONFIG_MMC #define CONFIG_FSL_ESDHC_PIN_MUX -#define CONFIG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC83xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC83xx_ESDHC_ADDR #endif /* diff --git a/include/configs/P1010RDB.h b/include/configs/P1010RDB.h index 03b823db0e1..addb306d57f 100644 --- a/include/configs/P1010RDB.h +++ b/include/configs/P1010RDB.h @@ -392,7 +392,7 @@ extern unsigned long get_sdram_size(void); #endif /* CONFIG_TSEC_ENET */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* diff --git a/include/configs/P2041RDB.h b/include/configs/P2041RDB.h index 42a7b4fac42..08c1bccb2b7 100644 --- a/include/configs/P2041RDB.h +++ b/include/configs/P2041RDB.h @@ -308,7 +308,7 @@ #endif #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* diff --git a/include/configs/T102xRDB.h b/include/configs/T102xRDB.h index afc38b4c40e..62c4177f309 100644 --- a/include/configs/T102xRDB.h +++ b/include/configs/T102xRDB.h @@ -365,7 +365,7 @@ * SDHC */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* Qman/Bman */ diff --git a/include/configs/T104xRDB.h b/include/configs/T104xRDB.h index d4ffaa4e522..ad8037e7a8c 100644 --- a/include/configs/T104xRDB.h +++ b/include/configs/T104xRDB.h @@ -346,7 +346,7 @@ */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* Qman/Bman */ diff --git a/include/configs/T208xQDS.h b/include/configs/T208xQDS.h index 6bab631e536..2dcaeda78b8 100644 --- a/include/configs/T208xQDS.h +++ b/include/configs/T208xQDS.h @@ -422,7 +422,7 @@ * SDHC */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* diff --git a/include/configs/T208xRDB.h b/include/configs/T208xRDB.h index 6e1c6d12523..223c8567517 100644 --- a/include/configs/T208xRDB.h +++ b/include/configs/T208xRDB.h @@ -379,7 +379,7 @@ * SDHC */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* diff --git a/include/configs/T4240RDB.h b/include/configs/T4240RDB.h index 35f3e79e549..12edfdd68db 100644 --- a/include/configs/T4240RDB.h +++ b/include/configs/T4240RDB.h @@ -382,7 +382,7 @@ */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif diff --git a/include/configs/apalis-imx8.h b/include/configs/apalis-imx8.h index c9f876f5da7..e2e491bdb0a 100644 --- a/include/configs/apalis-imx8.h +++ b/include/configs/apalis-imx8.h @@ -9,7 +9,7 @@ #include <asm/arch/imx-regs.h> #include <linux/sizes.h> -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5b010000 #define USDHC2_BASE_ADDR 0x5b020000 @@ -61,7 +61,7 @@ /* Link Definitions */ /* On Apalis iMX8 USDHC1 is eMMC, USDHC2 is 8-bit and USDHC3 is 4-bit MMC/SD */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 diff --git a/include/configs/apalis_imx6.h b/include/configs/apalis_imx6.h index 8f338943475..192c9cf0c30 100644 --- a/include/configs/apalis_imx6.h +++ b/include/configs/apalis_imx6.h @@ -22,8 +22,8 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 3 /* Network */ #define PHY_ANEG_TIMEOUT 15000 /* PHY needs longer aneg time */ diff --git a/include/configs/aristainetos2.h b/include/configs/aristainetos2.h index 8997c6a0ea9..1f2b3b58ca6 100644 --- a/include/configs/aristainetos2.h +++ b/include/configs/aristainetos2.h @@ -26,7 +26,7 @@ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 0 @@ -412,7 +412,7 @@ #define CONFIG_SYS_INIT_RAM_ADDR IRAM_BASE_ADDR #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 /* DMA stuff, needed for GPMI/MXS NAND support */ diff --git a/include/configs/cgtqmx8.h b/include/configs/cgtqmx8.h index 2c0bf877e86..c395384c8d3 100644 --- a/include/configs/cgtqmx8.h +++ b/include/configs/cgtqmx8.h @@ -20,7 +20,7 @@ /* Flat Device Tree Definitions */ #define CONFIG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 #define USDHC3_BASE_ADDR 0x5B030000 @@ -109,7 +109,7 @@ /* Link Definitions */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 diff --git a/include/configs/cl-som-imx7.h b/include/configs/cl-som-imx7.h index 1043eb75060..cbf85341a64 100644 --- a/include/configs/cl-som-imx7.h +++ b/include/configs/cl-som-imx7.h @@ -92,9 +92,9 @@ /* MMC Config*/ #ifdef CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #endif /* USB Configs */ diff --git a/include/configs/cm_fx6.h b/include/configs/cm_fx6.h index e5e8c13090a..874c0eb2175 100644 --- a/include/configs/cm_fx6.h +++ b/include/configs/cm_fx6.h @@ -15,8 +15,8 @@ /* Machine config */ /* MMC */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* RAM */ #define PHYS_SDRAM_1 MMDC0_ARB_BASE_ADDR diff --git a/include/configs/colibri-imx6ull.h b/include/configs/colibri-imx6ull.h index 31426b65ad5..d7e181b942a 100644 --- a/include/configs/colibri-imx6ull.h +++ b/include/configs/colibri-imx6ull.h @@ -18,8 +18,8 @@ /* ENET1 */ /* MMC Config */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 1 #define CONFIG_IPADDR 192.168.10.2 #define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/colibri-imx8x.h b/include/configs/colibri-imx8x.h index 5d6449c7f74..d641fbf47e7 100644 --- a/include/configs/colibri-imx8x.h +++ b/include/configs/colibri-imx8x.h @@ -10,7 +10,7 @@ #include <linux/sizes.h> #include <linux/stringify.h> -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5b010000 #define USDHC2_BASE_ADDR 0x5b020000 @@ -94,7 +94,7 @@ /* Environment in eMMC, before config block at the end of 1st "boot sector" */ /* On Colibri iMX8X USDHC1 is eMMC, USDHC2 is 4-bit SD */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 diff --git a/include/configs/colibri_imx6.h b/include/configs/colibri_imx6.h index d8b87366238..14fdf5b50e6 100644 --- a/include/configs/colibri_imx6.h +++ b/include/configs/colibri_imx6.h @@ -22,8 +22,8 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 /* USB Configs */ /* Host */ diff --git a/include/configs/colibri_imx7.h b/include/configs/colibri_imx7.h index c95b732f8dc..7380440ae7a 100644 --- a/include/configs/colibri_imx7.h +++ b/include/configs/colibri_imx7.h @@ -14,11 +14,11 @@ #include "mx7_common.h" /* MMC Config*/ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #ifdef CONFIG_TARGET_COLIBRI_IMX7_NAND -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 #elif CONFIG_TARGET_COLIBRI_IMX7_EMMC -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #endif #define CONFIG_IPADDR 192.168.10.2 diff --git a/include/configs/dart_6ul.h b/include/configs/dart_6ul.h index 36052fe7d86..6079596caec 100644 --- a/include/configs/dart_6ul.h +++ b/include/configs/dart_6ul.h @@ -15,9 +15,9 @@ /* NAND pin conflicts with usdhc2 */ #ifdef CONFIG_CMD_NAND -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 #else -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #endif #ifdef CONFIG_CMD_NET @@ -35,7 +35,7 @@ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* I2C configs */ diff --git a/include/configs/dh_imx6.h b/include/configs/dh_imx6.h index 2040deb2b87..54b2192b4a8 100644 --- a/include/configs/dh_imx6.h +++ b/include/configs/dh_imx6.h @@ -27,8 +27,8 @@ /* Miscellaneous configurable options */ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 3 /* UART */ #define CONFIG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/display5.h b/include/configs/display5.h index c23a57ee7a2..eb65f17cbe4 100644 --- a/include/configs/display5.h +++ b/include/configs/display5.h @@ -42,8 +42,8 @@ #define CONFIG_I2C_MULTI_BUS /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 #define PARTS_DEFAULT \ /* Linux partitions */ \ diff --git a/include/configs/el6x_common.h b/include/configs/el6x_common.h index 7fc3459ef29..affe20a1019 100644 --- a/include/configs/el6x_common.h +++ b/include/configs/el6x_common.h @@ -17,8 +17,8 @@ #endif /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 /* PMIC */ #define CONFIG_POWER_PFUZE100 diff --git a/include/configs/embestmx6boards.h b/include/configs/embestmx6boards.h index 7526d3b0f51..555239b8e81 100644 --- a/include/configs/embestmx6boards.h +++ b/include/configs/embestmx6boards.h @@ -22,7 +22,7 @@ #define CONFIG_MXC_USB_FLAGS 0 /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR @@ -36,11 +36,11 @@ #if defined(CONFIG_ENV_IS_IN_MMC) /* RiOTboard */ #define CONFIG_FDTFILE "imx6dl-riotboard.dtb" -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 #elif defined(CONFIG_ENV_IS_IN_SPI_FLASH) /* MarSBoard */ #define CONFIG_FDTFILE "imx6q-marsboard.dtb" -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #endif /* Framebuffer */ diff --git a/include/configs/ge_bx50v3.h b/include/configs/ge_bx50v3.h index ab8c66f263d..d519384d026 100644 --- a/include/configs/ge_bx50v3.h +++ b/include/configs/ge_bx50v3.h @@ -100,7 +100,7 @@ /* environment organization */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 /* Framebuffer */ #define CONFIG_IMX_HDMI diff --git a/include/configs/gw_ventana.h b/include/configs/gw_ventana.h index 714f8d88aff..a9ef35ebeb6 100644 --- a/include/configs/gw_ventana.h +++ b/include/configs/gw_ventana.h @@ -22,7 +22,7 @@ /* NAND */ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* * PCI express diff --git a/include/configs/imx6_logic.h b/include/configs/imx6_logic.h index a82641b6825..008fc079a65 100644 --- a/include/configs/imx6_logic.h +++ b/include/configs/imx6_logic.h @@ -18,8 +18,8 @@ #include "mx6_common.h" /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 /* Ethernet Configs */ diff --git a/include/configs/imx6q-bosch-acc.h b/include/configs/imx6q-bosch-acc.h index 201684ba802..5025ad9d9f2 100644 --- a/include/configs/imx6q-bosch-acc.h +++ b/include/configs/imx6q-bosch-acc.h @@ -94,17 +94,17 @@ #include "imx6_spl.h" #ifdef CONFIG_SPL_BUILD -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #ifdef CONFIG_SYS_BOOT_EMMC /* Boot from eMMC */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 1 +#define CFG_SYS_FSL_ESDHC_ADDR 1 #else /* Boot from SD-card */ -# define CONFIG_SYS_FSL_ESDHC_ADDR 0 +# define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/imx7-cm.h b/include/configs/imx7-cm.h index f0f800b8409..caa6a11d407 100644 --- a/include/configs/imx7-cm.h +++ b/include/configs/imx7-cm.h @@ -74,8 +74,8 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* MMC Config*/ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_USDHC_NUM 2 /* USB Configs */ diff --git a/include/configs/imx8mm-cl-iot-gate.h b/include/configs/imx8mm-cl-iot-gate.h index 8046a13e800..917d567d2ec 100644 --- a/include/configs/imx8mm-cl-iot-gate.h +++ b/include/configs/imx8mm-cl-iot-gate.h @@ -133,8 +133,8 @@ /* USDHC */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/imx8mm_data_modul_edm_sbc.h b/include/configs/imx8mm_data_modul_edm_sbc.h index 363378b574c..dd9f93f35c2 100644 --- a/include/configs/imx8mm_data_modul_edm_sbc.h +++ b/include/configs/imx8mm_data_modul_edm_sbc.h @@ -31,8 +31,8 @@ #define PHY_ANEG_TIMEOUT 20000 /* USDHC */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_EXTRA_ENV_SETTINGS \ "altbootcmd=setenv devpart 2 && run bootcmd ; reset\0" \ diff --git a/include/configs/imx8mm_icore_mx8mm.h b/include/configs/imx8mm_icore_mx8mm.h index 66bc8eef8d9..9cdba70493b 100644 --- a/include/configs/imx8mm_icore_mx8mm.h +++ b/include/configs/imx8mm_icore_mx8mm.h @@ -48,7 +48,7 @@ #define PHYS_SDRAM_SIZE SZ_2G /* 2GB DDR */ /* USDHC */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif /* __IMX8MM_ICORE_MX8MM_H */ diff --git a/include/configs/imx8mn_bsh_smm_s2pro.h b/include/configs/imx8mn_bsh_smm_s2pro.h index 37fda66f98e..035e5c7bd90 100644 --- a/include/configs/imx8mn_bsh_smm_s2pro.h +++ b/include/configs/imx8mn_bsh_smm_s2pro.h @@ -30,6 +30,6 @@ #define PHYS_SDRAM_SIZE SZ_512M /* USDHC */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif /* __IMX8MN_BSH_SMM_S2PRO_H */ diff --git a/include/configs/imx8mn_var_som.h b/include/configs/imx8mn_var_som.h index a1a93e6bee5..a484d913649 100644 --- a/include/configs/imx8mn_var_som.h +++ b/include/configs/imx8mn_var_som.h @@ -51,6 +51,6 @@ #define PHYS_SDRAM_SIZE SZ_1G /* 1GB DDR */ /* USDHC */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif /* __IMX8MN_VAR_SOM_H */ diff --git a/include/configs/imx8mp_dhcom_pdk2.h b/include/configs/imx8mp_dhcom_pdk2.h index 124119edc98..bf878251364 100644 --- a/include/configs/imx8mp_dhcom_pdk2.h +++ b/include/configs/imx8mp_dhcom_pdk2.h @@ -25,8 +25,8 @@ #define FEC_QUIRK_ENET_MAC /* USDHC */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_EXTRA_ENV_SETTINGS \ "altbootcmd=run bootcmd ; reset\0" \ diff --git a/include/configs/imx8mp_rsb3720.h b/include/configs/imx8mp_rsb3720.h index 5caabf21a64..5be46090a14 100644 --- a/include/configs/imx8mp_rsb3720.h +++ b/include/configs/imx8mp_rsb3720.h @@ -150,8 +150,8 @@ #define CONFIG_MXC_UART_BASE UART3_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #ifdef CONFIG_FSL_FSPI #define FSL_FSPI_FLASH_SIZE SZ_32M diff --git a/include/configs/imx8mq_cm.h b/include/configs/imx8mq_cm.h index 6aad04e9e97..4b2107e4057 100644 --- a/include/configs/imx8mq_cm.h +++ b/include/configs/imx8mq_cm.h @@ -56,7 +56,7 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/imx8mq_evk.h b/include/configs/imx8mq_evk.h index 8ecd3b7c271..2d4c8d78c67 100644 --- a/include/configs/imx8mq_evk.h +++ b/include/configs/imx8mq_evk.h @@ -62,7 +62,7 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/imx8mq_phanbell.h b/include/configs/imx8mq_phanbell.h index df5af640d45..1905e538c5b 100644 --- a/include/configs/imx8mq_phanbell.h +++ b/include/configs/imx8mq_phanbell.h @@ -94,7 +94,7 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/imx8qm_rom7720.h b/include/configs/imx8qm_rom7720.h index 308f17fd595..67f19bc1922 100644 --- a/include/configs/imx8qm_rom7720.h +++ b/include/configs/imx8qm_rom7720.h @@ -11,7 +11,7 @@ #include <asm/arch/imx-regs.h> #define CONFIG_SYS_BOOTMAPSZ (256 << 20) -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define USDHC1_BASE_ADDR 0x5B010000 #define USDHC2_BASE_ADDR 0x5B020000 #define USDHC3_BASE_ADDR 0x5B030000 @@ -106,7 +106,7 @@ * USDHC3 is for SD on base board On DDR4 board, USDHC1 is mux for NAND, * USDHC2 is for SD, USDHC3 is for SD on base board */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 #define CONFIG_SYS_SDRAM_BASE 0x80000000 #define PHYS_SDRAM_1 0x80000000 diff --git a/include/configs/imx93_evk.h b/include/configs/imx93_evk.h index a9749a1bcaa..b2814664086 100644 --- a/include/configs/imx93_evk.h +++ b/include/configs/imx93_evk.h @@ -131,7 +131,7 @@ #define PHYS_SDRAM 0x80000000 #define PHYS_SDRAM_SIZE 0x80000000 /* 2GB DDR */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 /* Using ULP WDOG for reset */ #define WDOG_BASE_ADDR WDG3_BASE_ADDR diff --git a/include/configs/kontron-sl-mx6ul.h b/include/configs/kontron-sl-mx6ul.h index 3bf7970ea80..d3447a80ca5 100644 --- a/include/configs/kontron-sl-mx6ul.h +++ b/include/configs/kontron-sl-mx6ul.h @@ -45,8 +45,8 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_USDHC_NUM 2 #endif #define CONFIG_EXTRA_ENV_SETTINGS BOOTENV diff --git a/include/configs/kontron_pitx_imx8m.h b/include/configs/kontron_pitx_imx8m.h index 5b461d290b7..6acd2f79253 100644 --- a/include/configs/kontron_pitx_imx8m.h +++ b/include/configs/kontron_pitx_imx8m.h @@ -70,7 +70,7 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(3) -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/kontron_sl28.h b/include/configs/kontron_sl28.h index de20f9b2e00..38860bfd5ca 100644 --- a/include/configs/kontron_sl28.h +++ b/include/configs/kontron_sl28.h @@ -20,7 +20,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL @@ -32,7 +32,7 @@ /* generic timer */ /* early heap for SPL DM */ -#define CONFIG_MALLOC_F_ADDR CONFIG_SYS_FSL_OCRAM_BASE +#define CONFIG_MALLOC_F_ADDR CFG_SYS_FSL_OCRAM_BASE /* serial port */ #define CONFIG_SYS_NS16550_CLK (get_bus_freq(0) / 2) diff --git a/include/configs/librem5.h b/include/configs/librem5.h index a83363ec869..dbd7d107dae 100644 --- a/include/configs/librem5.h +++ b/include/configs/librem5.h @@ -25,7 +25,7 @@ #endif /* CONFIG_SPL_BUILD*/ -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #define CONFIG_USBD_HS @@ -88,6 +88,6 @@ /* Monitor Command Prompt */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/liteboard.h b/include/configs/liteboard.h index a1fc056c305..a784002158b 100644 --- a/include/configs/liteboard.h +++ b/include/configs/liteboard.h @@ -20,7 +20,7 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR #endif #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/ls1012a_common.h b/include/configs/ls1012a_common.h index 87eb10db19f..77f84e1c9ea 100644 --- a/include/configs/ls1012a_common.h +++ b/include/configs/ls1012a_common.h @@ -11,12 +11,12 @@ #include <linux/sizes.h> #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL /*SPI device */ -#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 +#define CFG_SYS_FSL_QSPI_BASE 0x40000000 /* SATA */ diff --git a/include/configs/ls1012afrwy.h b/include/configs/ls1012afrwy.h index a0ff3b89790..1b417c72e70 100644 --- a/include/configs/ls1012afrwy.h +++ b/include/configs/ls1012afrwy.h @@ -17,7 +17,7 @@ #define SYS_SDRAM_SIZE_1024 0x40000000 /* ENV */ -#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 +#define CFG_SYS_FSL_QSPI_BASE 0x40000000 #undef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls1028a_common.h b/include/configs/ls1028a_common.h index 24422665e87..43dbeea1b3b 100644 --- a/include/configs/ls1028a_common.h +++ b/include/configs/ls1028a_common.h @@ -14,7 +14,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL @@ -57,7 +57,7 @@ "env exists secureboot && esbc_halt;" #define OCRAM_NONSECURE_SIZE 0x00010000 -#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 +#define CFG_SYS_FSL_QSPI_BASE 0x20000000 /* I2C bus multiplexer */ #define I2C_MUX_PCA_ADDR_PRI 0x77 /* Primary Mux*/ diff --git a/include/configs/ls1043a_common.h b/include/configs/ls1043a_common.h index b32e39ec722..8c19468141a 100644 --- a/include/configs/ls1043a_common.h +++ b/include/configs/ls1043a_common.h @@ -33,7 +33,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL diff --git a/include/configs/ls1046a_common.h b/include/configs/ls1046a_common.h index 03a88505680..7e1a724387e 100644 --- a/include/configs/ls1046a_common.h +++ b/include/configs/ls1046a_common.h @@ -33,7 +33,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000 -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x880000000ULL diff --git a/include/configs/ls1046afrwy.h b/include/configs/ls1046afrwy.h index 582b1ee93cd..48408f28583 100644 --- a/include/configs/ls1046afrwy.h +++ b/include/configs/ls1046afrwy.h @@ -73,7 +73,7 @@ /* * Environment */ -#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 +#define CFG_SYS_FSL_QSPI_BASE 0x40000000 #undef BOOT_TARGET_DEVICES #define BOOT_TARGET_DEVICES(func) \ diff --git a/include/configs/ls1046ardb.h b/include/configs/ls1046ardb.h index f5f16bae2d6..769349336af 100644 --- a/include/configs/ls1046ardb.h +++ b/include/configs/ls1046ardb.h @@ -104,7 +104,7 @@ /* * Environment */ -#define CONFIG_SYS_FSL_QSPI_BASE 0x40000000 +#define CFG_SYS_FSL_QSPI_BASE 0x40000000 #define AQR105_IRQ_MASK 0x80000000 /* FMan */ diff --git a/include/configs/ls1088a_common.h b/include/configs/ls1088a_common.h index 3db17d9fd7c..73e4ac3e3d4 100644 --- a/include/configs/ls1088a_common.h +++ b/include/configs/ls1088a_common.h @@ -27,11 +27,11 @@ /* Link Definitions */ /* Link Definitions */ -#define CONFIG_SYS_FSL_QSPI_BASE 0x20000000 +#define CFG_SYS_FSL_QSPI_BASE 0x20000000 #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL /* diff --git a/include/configs/ls2080a_common.h b/include/configs/ls2080a_common.h index 85d7118ac19..53a3af1baac 100644 --- a/include/configs/ls2080a_common.h +++ b/include/configs/ls2080a_common.h @@ -18,7 +18,7 @@ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE #define CONFIG_SYS_DDR_BLOCK2_BASE 0x8080000000ULL diff --git a/include/configs/lx2160a_common.h b/include/configs/lx2160a_common.h index 59e54bf6f07..8b2b7479c11 100644 --- a/include/configs/lx2160a_common.h +++ b/include/configs/lx2160a_common.h @@ -15,7 +15,7 @@ /* DDR */ #define CONFIG_VERY_BIG_RAM #define CONFIG_SYS_DDR_SDRAM_BASE 0x80000000UL -#define CONFIG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 +#define CFG_SYS_FSL_DDR_SDRAM_BASE_PHY 0 #define CONFIG_SYS_DDR_BLOCK2_BASE 0x2080000000ULL #define CONFIG_SYS_SDRAM_SIZE 0x200000000UL #define CONFIG_SYS_SDRAM_BASE CONFIG_SYS_DDR_SDRAM_BASE diff --git a/include/configs/m53menlo.h b/include/configs/m53menlo.h index f8bd31d702f..a20b41bdf07 100644 --- a/include/configs/m53menlo.h +++ b/include/configs/m53menlo.h @@ -37,7 +37,7 @@ * MMC Driver */ #ifdef CONFIG_CMD_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif /* diff --git a/include/configs/mccmon6.h b/include/configs/mccmon6.h index 17986a0e348..69ca7c52753 100644 --- a/include/configs/mccmon6.h +++ b/include/configs/mccmon6.h @@ -22,8 +22,8 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configuration */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* NOR 16-bit mode */ #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR diff --git a/include/configs/mx51evk.h b/include/configs/mx51evk.h index fbc9a041693..95afb350ec3 100644 --- a/include/configs/mx51evk.h +++ b/include/configs/mx51evk.h @@ -34,7 +34,7 @@ /* * MMC Configs * */ -#define CONFIG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR MMC_SDHC1_BASE_ADDR /* USB Configs */ #define CONFIG_MXC_USB_PORT 1 diff --git a/include/configs/mx53cx9020.h b/include/configs/mx53cx9020.h index d58d1534a3b..77835639720 100644 --- a/include/configs/mx53cx9020.h +++ b/include/configs/mx53cx9020.h @@ -17,7 +17,7 @@ #define CONFIG_MXC_UART_BASE UART2_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* bootz: zImage/initrd.img support */ diff --git a/include/configs/mx53loco.h b/include/configs/mx53loco.h index 60ec34cf8e0..3c9b2ad58ee 100644 --- a/include/configs/mx53loco.h +++ b/include/configs/mx53loco.h @@ -14,7 +14,7 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ #define CONFIG_MXC_USB_PORT 1 @@ -25,7 +25,7 @@ #define CONFIG_POWER_FSL #define CONFIG_POWER_FSL_MC13892 #define CONFIG_SYS_DIALOG_PMIC_I2C_ADDR 0x48 -#define CONFIG_SYS_FSL_PMIC_I2C_ADDR 0x8 +#define CFG_SYS_FSL_PMIC_I2C_ADDR 0x8 /* Command definition */ diff --git a/include/configs/mx6cuboxi.h b/include/configs/mx6cuboxi.h index cffbb64bcd5..bc90b9563ad 100644 --- a/include/configs/mx6cuboxi.h +++ b/include/configs/mx6cuboxi.h @@ -14,7 +14,7 @@ #include "imx6_spl.h" /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* Framebuffer */ #define CONFIG_IMX_HDMI diff --git a/include/configs/mx6sabre_common.h b/include/configs/mx6sabre_common.h index bfcab1bed5b..bc9fab12909 100644 --- a/include/configs/mx6sabre_common.h +++ b/include/configs/mx6sabre_common.h @@ -13,7 +13,7 @@ #include "mx6_common.h" /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #ifdef CONFIG_SUPPORT_EMMC_BOOT #define EMMC_ENV \ diff --git a/include/configs/mx6sabreauto.h b/include/configs/mx6sabreauto.h index 7e54bb2312b..61570b7af53 100644 --- a/include/configs/mx6sabreauto.h +++ b/include/configs/mx6sabreauto.h @@ -33,7 +33,7 @@ #define CONFIG_SYS_FLASH_BASE WEIM_ARB_BASE_ADDR #endif -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 /* NAND stuff */ #define CONFIG_SYS_NAND_BASE 0x40000000 diff --git a/include/configs/mx6sabresd.h b/include/configs/mx6sabresd.h index 16f8858abb8..49cd1512dc5 100644 --- a/include/configs/mx6sabresd.h +++ b/include/configs/mx6sabresd.h @@ -21,7 +21,7 @@ /* Falcon Mode - MMC support: args@1MB kernel@2MB */ -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 #ifdef CONFIG_CMD_PCI #define CONFIG_PCIE_IMX_PERST_GPIO IMX_GPIO_NR(7, 12) diff --git a/include/configs/mx6slevk.h b/include/configs/mx6slevk.h index 9f890938f98..26b97bd3f2e 100644 --- a/include/configs/mx6slevk.h +++ b/include/configs/mx6slevk.h @@ -17,7 +17,7 @@ #define CONFIG_MXC_UART_BASE UART1_IPS_BASE_ADDR /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR #define CONFIG_EXTRA_ENV_SETTINGS \ "script=boot.scr\0" \ @@ -98,6 +98,6 @@ #define CONFIG_MXC_USB_FLAGS 0 #endif -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_USDHC_NUM 3 #endif /* __CONFIG_H */ diff --git a/include/configs/mx6sllevk.h b/include/configs/mx6sllevk.h index e9ccb99d3ce..44a5eeff198 100644 --- a/include/configs/mx6sllevk.h +++ b/include/configs/mx6sllevk.h @@ -89,8 +89,8 @@ /* Environment organization */ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 3 +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_USDHC_NUM 3 #define CONFIG_IOMUX_LPSR diff --git a/include/configs/mx6sxsabreauto.h b/include/configs/mx6sxsabreauto.h index 407b64383ee..0d9764e3b4c 100644 --- a/include/configs/mx6sxsabreauto.h +++ b/include/configs/mx6sxsabreauto.h @@ -83,7 +83,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* MMC Configuration */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR /* NAND stuff */ #define CONFIG_SYS_NAND_BASE 0x40000000 @@ -100,6 +100,6 @@ #define CONFIG_MXC_USB_FLAGS 0 #endif -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #endif /* __CONFIG_H */ diff --git a/include/configs/mx6sxsabresd.h b/include/configs/mx6sxsabresd.h index 570e2ce687a..83779f09bfc 100644 --- a/include/configs/mx6sxsabresd.h +++ b/include/configs/mx6sxsabresd.h @@ -115,7 +115,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* MMC Configuration */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR /* Network */ diff --git a/include/configs/mx6ul_14x14_evk.h b/include/configs/mx6ul_14x14_evk.h index ab56ea0205d..d0e3d3f0284 100644 --- a/include/configs/mx6ul_14x14_evk.h +++ b/include/configs/mx6ul_14x14_evk.h @@ -22,13 +22,13 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* NAND pin conflicts with usdhc2 */ #ifdef CONFIG_NAND_MXS -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 #else -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 #endif #endif diff --git a/include/configs/mx6ullevk.h b/include/configs/mx6ullevk.h index 00cc547b900..604923ec2b7 100644 --- a/include/configs/mx6ullevk.h +++ b/include/configs/mx6ullevk.h @@ -20,8 +20,8 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_USDHC_NUM 2 #endif #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/mys_6ulx.h b/include/configs/mys_6ulx.h index bb68ddbd39d..a777305ec76 100644 --- a/include/configs/mys_6ulx.h +++ b/include/configs/mys_6ulx.h @@ -13,13 +13,13 @@ /* SPL options */ #include "imx6_spl.h" -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 /* Console configs */ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* Physical Memory Map */ #define PHYS_SDRAM MMDC0_ARB_BASE_ADDR diff --git a/include/configs/nitrogen6x.h b/include/configs/nitrogen6x.h index d507f8f11c0..ec5339d930a 100644 --- a/include/configs/nitrogen6x.h +++ b/include/configs/nitrogen6x.h @@ -16,8 +16,8 @@ #define CONFIG_MXC_UART_BASE UART2_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 #define IMX_FEC_BASE ENET_BASE_ADDR #define CONFIG_FEC_MXC_PHYADDR 6 diff --git a/include/configs/novena.h b/include/configs/novena.h index 1696aa28520..f2a04ca6185 100644 --- a/include/configs/novena.h +++ b/include/configs/novena.h @@ -43,8 +43,8 @@ /* I2C EEPROM */ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 /* PCI express */ #ifdef CONFIG_CMD_PCI diff --git a/include/configs/npi_imx6ull.h b/include/configs/npi_imx6ull.h index 8ff26feb741..ccc203f5f24 100644 --- a/include/configs/npi_imx6ull.h +++ b/include/configs/npi_imx6ull.h @@ -13,13 +13,13 @@ /* SPL options */ #include "imx6_spl.h" -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 /* Console configs */ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR #define CONFIG_NETMASK 255.255.255.0 diff --git a/include/configs/p1_p2_rdb_pc.h b/include/configs/p1_p2_rdb_pc.h index 82823ca8a0f..778bf5112af 100644 --- a/include/configs/p1_p2_rdb_pc.h +++ b/include/configs/p1_p2_rdb_pc.h @@ -417,7 +417,7 @@ */ #ifdef CONFIG_MMC -#define CONFIG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR CFG_SYS_MPC85xx_ESDHC_ADDR #endif /* diff --git a/include/configs/pcl063.h b/include/configs/pcl063.h index 5b38a94aa5d..dea87122ebc 100644 --- a/include/configs/pcl063.h +++ b/include/configs/pcl063.h @@ -22,14 +22,14 @@ * Tweak the SPL text base address to avoid this. */ -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 /* Console configs */ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR /* Miscellaneous configurable options */ diff --git a/include/configs/pcl063_ull.h b/include/configs/pcl063_ull.h index 688d161964a..2bdae8afa8c 100644 --- a/include/configs/pcl063_ull.h +++ b/include/configs/pcl063_ull.h @@ -16,7 +16,7 @@ /* SPL options */ #include "imx6_spl.h" -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 /* Environment settings */ @@ -29,7 +29,7 @@ /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* I2C configs */ diff --git a/include/configs/pico-imx6.h b/include/configs/pico-imx6.h index dcbcd8d2449..687133b9bdd 100644 --- a/include/configs/pico-imx6.h +++ b/include/configs/pico-imx6.h @@ -21,7 +21,7 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configuration */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/pico-imx6ul.h b/include/configs/pico-imx6ul.h index c0d837d7c51..d4f58b6a7b0 100644 --- a/include/configs/pico-imx6ul.h +++ b/include/configs/pico-imx6ul.h @@ -27,7 +27,7 @@ #define CONFIG_MXC_UART_BASE UART6_BASE_ADDR /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC1_BASE_ADDR /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/pico-imx7d.h b/include/configs/pico-imx7d.h index 7fbf2c3f55f..159bf4c68ca 100644 --- a/include/configs/pico-imx7d.h +++ b/include/configs/pico-imx7d.h @@ -21,7 +21,7 @@ #define CONFIG_MXC_UART_BASE UART5_IPS_BASE_ADDR /* MMC Config */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_DFU_ENV_SETTINGS \ "dfu_alt_info=" \ @@ -113,7 +113,7 @@ /* Environment starts at 768k = 768 * 1024 = 786432 */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_USDHC_NUM 2 /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/pico-imx8mq.h b/include/configs/pico-imx8mq.h index 1ee1edbdfff..17af19d49dc 100644 --- a/include/configs/pico-imx8mq.h +++ b/include/configs/pico-imx8mq.h @@ -73,7 +73,7 @@ #define CONFIG_MXC_UART_BASE UART_BASE_ADDR(1) -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #endif diff --git a/include/configs/smegw01.h b/include/configs/smegw01.h index 681c831747b..faa13c65216 100644 --- a/include/configs/smegw01.h +++ b/include/configs/smegw01.h @@ -15,7 +15,7 @@ #define PHYS_SDRAM_SIZE SZ_512M /* MMC Config*/ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_EXTRA_ENV_SETTINGS \ "image=zImage\0" \ diff --git a/include/configs/somlabs_visionsom_6ull.h b/include/configs/somlabs_visionsom_6ull.h index eeee587bafd..49672dfe7c3 100644 --- a/include/configs/somlabs_visionsom_6ull.h +++ b/include/configs/somlabs_visionsom_6ull.h @@ -19,9 +19,9 @@ /* MMC Configs */ #ifdef CONFIG_FSL_USDHC -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 #endif /* CONFIG_FSL_USDHC */ #define CONFIG_EXTRA_ENV_SETTINGS \ diff --git a/include/configs/tqma6.h b/include/configs/tqma6.h index 9498dbeadf4..2c589158952 100644 --- a/include/configs/tqma6.h +++ b/include/configs/tqma6.h @@ -44,7 +44,7 @@ #endif /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/udoo.h b/include/configs/udoo.h index 03e5c04af6e..8af5151c503 100644 --- a/include/configs/udoo.h +++ b/include/configs/udoo.h @@ -15,7 +15,7 @@ #define CONFIG_MXC_UART_BASE UART2_BASE /* MMC Configuration */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_EXTRA_ENV_SETTINGS \ "console=ttymxc1,115200\0" \ diff --git a/include/configs/udoo_neo.h b/include/configs/udoo_neo.h index e30b6cc82d8..093e2e8dae7 100644 --- a/include/configs/udoo_neo.h +++ b/include/configs/udoo_neo.h @@ -15,7 +15,7 @@ #include "imx6_spl.h" /* MMC Configuration */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* Command definition */ #define CONFIG_MXC_UART_BASE UART1_BASE diff --git a/include/configs/usbarmory.h b/include/configs/usbarmory.h index 08a6f5fbccd..c381934f31a 100644 --- a/include/configs/usbarmory.h +++ b/include/configs/usbarmory.h @@ -20,7 +20,7 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* SD/MMC */ -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB */ #define CONFIG_MXC_USB_PORT 1 diff --git a/include/configs/vf610twr.h b/include/configs/vf610twr.h index dde6d130caa..7e3d3473b44 100644 --- a/include/configs/vf610twr.h +++ b/include/configs/vf610twr.h @@ -19,7 +19,7 @@ /* Dynamic MTD partition support */ #endif -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_ESDHC_ADDR 0 #define CONFIG_FEC_MXC_PHYADDR 0 diff --git a/include/configs/vining_2000.h b/include/configs/vining_2000.h index 6eb022f26c5..a4484fd3f8c 100644 --- a/include/configs/vining_2000.h +++ b/include/configs/vining_2000.h @@ -32,7 +32,7 @@ #define CONFIG_SYS_INIT_RAM_SIZE IRAM_SIZE /* MMC Configuration */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC4_BASE_ADDR /* PMIC */ #define CONFIG_POWER_PFUZE100 diff --git a/include/configs/wandboard.h b/include/configs/wandboard.h index 899b8ca470e..91c1f4b3b51 100644 --- a/include/configs/wandboard.h +++ b/include/configs/wandboard.h @@ -15,8 +15,8 @@ #define CONFIG_MXC_UART_BASE UART1_BASE /* MMC Configuration */ -#define CONFIG_SYS_FSL_USDHC_NUM 2 -#define CONFIG_SYS_FSL_ESDHC_ADDR 0 +#define CFG_SYS_FSL_USDHC_NUM 2 +#define CFG_SYS_FSL_ESDHC_ADDR 0 /* USB Configs */ #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/warp7.h b/include/configs/warp7.h index a9cc8595357..a4b12dc55ed 100644 --- a/include/configs/warp7.h +++ b/include/configs/warp7.h @@ -14,7 +14,7 @@ #define PHYS_SDRAM_SIZE SZ_512M /* MMC Config*/ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC3_BASE_ADDR #define CONFIG_DFU_ENV_SETTINGS \ "dfu_alt_info=boot raw 0x2 0x1000 mmcpart 1\0" \ @@ -90,7 +90,7 @@ /* environment organization */ -#define CONFIG_SYS_FSL_USDHC_NUM 1 +#define CFG_SYS_FSL_USDHC_NUM 1 #define CONFIG_MXC_USB_PORTSC (PORT_PTS_UTMI | PORT_PTS_PTW) diff --git a/include/configs/xpress.h b/include/configs/xpress.h index 0e43b373649..fc8ec3204b1 100644 --- a/include/configs/xpress.h +++ b/include/configs/xpress.h @@ -16,7 +16,7 @@ #define CONFIG_MXC_UART_BASE MX6UL_UART7_BASE_ADDR /* MMC Configs */ -#define CONFIG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR +#define CFG_SYS_FSL_ESDHC_ADDR USDHC2_BASE_ADDR /* Miscellaneous configurable options */ diff --git a/include/fm_eth.h b/include/fm_eth.h index bf9570679d2..7475b515073 100644 --- a/include/fm_eth.h +++ b/include/fm_eth.h @@ -51,18 +51,18 @@ enum fm_eth_type { */ #ifdef CONFIG_SYS_FMAN_V3 #ifdef CONFIG_TARGET_LS1046AFRWY -#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfd000) +#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CFG_SYS_FSL_FM1_ADDR + 0xfd000) #else -#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfc000) +#define CONFIG_SYS_FM1_DTSEC_MDIO_ADDR (CFG_SYS_FSL_FM1_ADDR + 0xfc000) #endif -#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xfd000) +#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CFG_SYS_FSL_FM1_ADDR + 0xfd000) #if (CONFIG_SYS_NUM_FMAN == 2) -#define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR (CONFIG_SYS_FSL_FM2_ADDR + 0xfc000) -#define CONFIG_SYS_FM2_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM2_ADDR + 0xfd000) +#define CONFIG_SYS_FM2_DTSEC_MDIO_ADDR (CFG_SYS_FSL_FM2_ADDR + 0xfc000) +#define CONFIG_SYS_FM2_TGEC_MDIO_ADDR (CFG_SYS_FSL_FM2_ADDR + 0xfd000) #endif #else -#define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xe1120) -#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CONFIG_SYS_FSL_FM1_ADDR + 0xf1000) +#define CONFIG_SYS_FM1_DTSEC1_MDIO_ADDR (CFG_SYS_FSL_FM1_ADDR + 0xe1120) +#define CONFIG_SYS_FM1_TGEC_MDIO_ADDR (CFG_SYS_FSL_FM1_ADDR + 0xf1000) #endif #define DEFAULT_FM_MDIO_NAME "FSL_MDIO0" @@ -84,7 +84,7 @@ enum fm_eth_type { .port = FM##idx##_DTSEC##n, \ .rx_port_id = RX_PORT_1G_BASE + n - 1, \ .tx_port_id = TX_PORT_1G_BASE + n - 1, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, memac[n-1]),\ } @@ -98,7 +98,7 @@ enum fm_eth_type { .port = FM##idx##_10GEC##n, \ .rx_port_id = RX_PORT_10G_BASE2 + n - 1, \ .tx_port_id = TX_PORT_10G_BASE2 + n - 1, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, memac[n-1]),\ } #else @@ -112,7 +112,7 @@ enum fm_eth_type { .port = FM##idx##_10GEC##n, \ .rx_port_id = RX_PORT_10G_BASE + n - 1, \ .tx_port_id = TX_PORT_10G_BASE + n - 1, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, memac[n-1+8]),\ } #else @@ -125,7 +125,7 @@ enum fm_eth_type { .port = FM##idx##_10GEC##n, \ .rx_port_id = RX_PORT_10G_BASE + n - 1, \ .tx_port_id = TX_PORT_10G_BASE + n - 1, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, memac[n-1+8]),\ } #endif @@ -141,7 +141,7 @@ enum fm_eth_type { .port = FM##idx##_10GEC##n, \ .rx_port_id = RX_PORT_10G_BASE2 + n - 3, \ .tx_port_id = TX_PORT_10G_BASE2 + n - 3, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, memac[n-1-2]),\ } #endif @@ -156,7 +156,7 @@ enum fm_eth_type { .port = FM##idx##_DTSEC##n, \ .rx_port_id = RX_PORT_1G_BASE + n - 1, \ .tx_port_id = TX_PORT_1G_BASE + n - 1, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, mac_1g[n-1]),\ } @@ -169,7 +169,7 @@ enum fm_eth_type { .port = FM##idx##_10GEC##n, \ .rx_port_id = RX_PORT_10G_BASE + n - 1, \ .tx_port_id = TX_PORT_10G_BASE + n - 1, \ - .compat_offset = CONFIG_SYS_FSL_FM##idx##_OFFSET + \ + .compat_offset = CFG_SYS_FSL_FM##idx##_OFFSET + \ offsetof(struct ccsr_fman, mac_10g[n-1]),\ } #endif diff --git a/include/fsl_sec.h b/include/fsl_sec.h index d57c4ca820c..d8861d1d0b7 100644 --- a/include/fsl_sec.h +++ b/include/fsl_sec.h @@ -272,7 +272,7 @@ struct sg_entry { #if defined(CONFIG_MX6) || defined(CONFIG_MX7) || \ defined(CONFIG_MX7ULP) || defined(CONFIG_IMX8M) || defined(CONFIG_IMX8) /* Job Ring Base Address */ -#define JR_BASE_ADDR(x) (CONFIG_SYS_FSL_SEC_ADDR + 0x1000 * (x + 1)) +#define JR_BASE_ADDR(x) (CFG_SYS_FSL_SEC_ADDR + 0x1000 * (x + 1)) /* Secure Memory Offset varies accross versions */ #define SM_V1_OFFSET 0x0f4 #define SM_V2_OFFSET 0xa00 @@ -287,7 +287,7 @@ struct sg_entry { /* JR Allocation Error */ #define SMCSJR_AERR (3 << 12) /* Secure memory partition 0 page 0 owner register */ -#define CAAM_SMPO_0 (CONFIG_SYS_FSL_SEC_ADDR + 0x1FBC) +#define CAAM_SMPO_0 (CFG_SYS_FSL_SEC_ADDR + 0x1FBC) /* Secure memory command register */ #define CAAM_SMCJR(v, jr) (JR_BASE_ADDR(jr) + SM_OFFSET(v) + SM_CMD(v)) /* Secure memory command status register */ |