Merge branch '2021-11-17-assorted-driver-platform-updates' into next

- NVMe updates
- TI AM64x related USB updates
- Update PCIe CAM support macros, add PCI CAM support as well
- AST2600, Apple (ARM64) pinctrl drivers
- ARM-specific DEBUG uart inconsistencies fixed
- MediaTek MMC improvement
- aspeed: Support secure boot chain with FIT image verification

4 files changed, 47 insertions, 9 deletions

diff --git a/include/configs/aspeed-common.h b/include/configs/aspeed-common.h
index 5177bf20fad..96526e1a75c 100644
--- a/include/configs/aspeed-common.h
+++ b/include/configs/aspeed-common.h
@@ -38,13 +38,4 @@
  */
 #define CONFIG_BOOTP_BOOTFILESIZE
 
-/*
- * Miscellaneous configurable options
- */
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	"verify=yes\0"	\
-	"spi_dma=yes\0" \
-	""
-
 #endif	/* __AST_COMMON_CONFIG_H */
diff --git a/include/configs/evb_ast2500.h b/include/configs/evb_ast2500.h
index dc032c1a419..558d6f9452c 100644
--- a/include/configs/evb_ast2500.h
+++ b/include/configs/evb_ast2500.h
@@ -13,4 +13,11 @@
 
 #define CONFIG_SYS_UBOOT_BASE		CONFIG_SYS_TEXT_BASE
 
+/* Memory Info */
+#define CONFIG_SYS_LOAD_ADDR		0x83000000
+
+/* Misc */
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	""
+
 #endif	/* __CONFIG_H */
diff --git a/include/configs/evb_ast2600.h b/include/configs/evb_ast2600.h
index 177a52eb916..9049a9fc105 100644
--- a/include/configs/evb_ast2600.h
+++ b/include/configs/evb_ast2600.h
@@ -10,4 +10,18 @@
 
 #define CONFIG_SYS_UBOOT_BASE		CONFIG_SYS_TEXT_BASE
 
+/* Memory Info */
+#define CONFIG_SYS_LOAD_ADDR		0x83000000
+
+/* Misc */
+#define STR_HELPER(s)	#s
+#define STR(s)		STR_HELPER(s)
+
+#define CONFIG_EXTRA_ENV_SETTINGS \
+	"loadaddr=" STR(CONFIG_SYS_LOAD_ADDR) "\0" \
+	"bootspi=fdt addr 20100000 && fdt header get fitsize totalsize && " \
+	"cp.b 20100000 ${loadaddr} ${fitsize} && bootm; " \
+	"echo Error loading kernel FIT image\0" \
+	""
+
 #endif	/* __CONFIG_H */
diff --git a/include/pci.h b/include/pci.h
index 797f224e2fc..6c1094d7299 100644
--- a/include/pci.h
+++ b/include/pci.h
@@ -522,6 +522,32 @@
 
 #include <pci_ids.h>
 
+/*
+ * Enhanced Configuration Access Mechanism (ECAM)
+ *
+ * See PCI Express Base Specification, Revision 5.0, Version 1.0,
+ * Section 7.2.2, Table 7-1, p. 677.
+ */
+#define PCIE_ECAM_BUS_SHIFT	20 /* Bus number */
+#define PCIE_ECAM_DEV_SHIFT	15 /* Device number */
+#define PCIE_ECAM_FUNC_SHIFT	12 /* Function number */
+
+#define PCIE_ECAM_BUS_MASK	0xff
+#define PCIE_ECAM_DEV_MASK	0x1f
+#define PCIE_ECAM_FUNC_MASK	0x7
+#define PCIE_ECAM_REG_MASK	0xfff /* Limit offset to a maximum of 4K */
+
+#define PCIE_ECAM_BUS(x)	(((x) & PCIE_ECAM_BUS_MASK) << PCIE_ECAM_BUS_SHIFT)
+#define PCIE_ECAM_DEV(x)	(((x) & PCIE_ECAM_DEV_MASK) << PCIE_ECAM_DEV_SHIFT)
+#define PCIE_ECAM_FUNC(x)	(((x) & PCIE_ECAM_FUNC_MASK) << PCIE_ECAM_FUNC_SHIFT)
+#define PCIE_ECAM_REG(x)	((x) & PCIE_ECAM_REG_MASK)
+
+#define PCIE_ECAM_OFFSET(bus, dev, func, where) \
+	(PCIE_ECAM_BUS(bus) | \
+	 PCIE_ECAM_DEV(dev) | \
+	 PCIE_ECAM_FUNC(func) | \
+	 PCIE_ECAM_REG(where))
+
 #ifndef __ASSEMBLY__
 
 #include <dm/pci.h>