Merge tag 'xilinx-for-v2025.01-rc3-v2' of https://source.denx.de/u-boot/custodians/u-boot-microblaze

AMD/Xilinx changes for v2025.01-rc3:

- microblaze:
  - Disable JFFS2
- fpga:
  - pass compatible flag to fpga_load()
- zynqmp:
  - SOM RTC fix
  - SC(system controller) PMW polarity fix
  - Fix ram_top calculation with introducing XILINX_MINI
  - Fix RPU release command
- versal:
  - Enable capsule update
  - Enable soft reset and Micron octal flashes
- xilinx:
  - Align Kconfig regarding SPI_STACKED_PARALLEL
- bootcount:
  - Add new zynqmp driver

2 files changed, 23 insertions, 1 deletions

diff --git a/include/configs/microblaze-generic.h b/include/configs/microblaze-generic.h
index 6740ab2be3e..3bcc4c48dc8 100644
--- a/include/configs/microblaze-generic.h
+++ b/include/configs/microblaze-generic.h
@@ -82,7 +82,7 @@
 	"nor0=flash-0\0"\
 	"mtdparts=mtdparts=flash-0:"\
 	"256k(u-boot),256k(env),3m(kernel),"\
-	"1m(romfs),1m(cramfs),-(jffs2)\0"\
+	"1m(romfs),1m(cramfs),-(fs)\0"\
 	"nc=setenv stdout nc;"\
 	"setenv stdin nc\0" \
 	"serial=setenv stdout serial;"\
diff --git a/include/memtop.h b/include/memtop.h
new file mode 100644
index 00000000000..28f62e24ea7
--- /dev/null
+++ b/include/memtop.h
@@ -0,0 +1,22 @@
+/* SPDX-License-Identifier: GPL-2.0+ */
+/*
+ * Copyright (c) 2024, Linaro Limited
+ */
+
+/**
+ * get_mem_top() - Compute the value of ram_top
+ * @ram_start:	Start of RAM
+ * @ram_size:	RAM size
+ * @size:	Minimum RAM size requested
+ * @fdt:	FDT blob
+ *
+ * The function computes the top address of RAM memory that can be
+ * used by U-Boot. This is being done by going through the list of
+ * reserved memory regions specified in the devicetree blob passed
+ * to the function. The logic used here is derived from the lmb
+ * allocation function.
+ *
+ * Return: address of ram top on success, 0 on failure
+ */
+phys_addr_t get_mem_top(phys_addr_t ram_start, phys_size_t ram_size,
+			phys_size_t size, void *fdt);