smbios: add support for dynamic generation of Type 9 system slot tables

This commit introduces support for generating SMBIOS Type 9 (System Slot)
tables using a hybrid approach:

1. Explicit Device Tree definitions:
   Child node under '/smbios/smbios/system-slot' will be interpreted as
   individual slot definitions.
   - Each child represents a slot (e.g., isa, pcmcia, etc.).
   - Properties follow the SMBIOS specification using lowercase
     hyphen-separated names such as 'slot-type', 'slot-id',
     'segment-group-number', 'bus-number', 'slot-information', etc.
   - This approach allows full customization of each system slot and is
     especially suitable for platforms with well-defined slot topology.

2. Automatic detection fallback:
   If child node under '/smbios/smbios/system-slot' does not exist, the
   implementation will scan the entire device tree for nodes whose
   'device_type' matches known slot-related types ("pci", "isa", "pcmcia",
   etc.).
   - When a match is found, default values or heuristics are applied to
     populate to the System Slot table.
   - This mode is useful for platforms that lack explicit SMBIOS nodes
     but still expose slot topology via standard DT conventions.

Together, two approaches ensure that SMBIOS Type 9 entries are available
whether explicitly described or automatically derived.

Signed-off-by: Raymond Mao <[email protected]>
Tested-by: Ilias Apalodimas <[email protected]>

2 files changed, 134 insertions, 0 deletions

diff --git a/include/smbios.h b/include/smbios.h
index f2f7483bce5..752a25250d3 100644
--- a/include/smbios.h
+++ b/include/smbios.h
@@ -264,6 +264,51 @@ struct __packed smbios_type7 {
 	char eos[SMBIOS_STRUCT_EOS_BYTES];
 };
 
+#define SMBIOS_TYPE9_PGROUP_SIZE 5
+
+struct pci_attr_lookup_table {
+	const char *str;
+	u8 slot_type;
+	u8 data_bus_width;
+	u8 slot_length;
+	u8 chara1;
+	u8 chara2;
+};
+
+union dev_func_num {
+	struct {
+		u8 dev_num:5;
+		u8 func_num:3;
+	} fields;
+	u8 data;
+};
+
+struct __packed smbios_type9 {
+	struct smbios_header hdr;
+	u8 socket_design;
+	u8 slot_type;
+	u8 slot_data_bus_width;
+	u8 current_usage;
+	u8 slot_length;
+	u16 slot_id;
+	u8 slot_characteristics_1;
+	u8 slot_characteristics_2;
+	u16 segment_group_number;
+	u8 bus_number;
+	union dev_func_num device_function_number;
+	u8 electrical_bus_width;
+	u8 peer_grouping_count;
+	/*
+	 * Dynamic bytes will be inserted here to store peer_groups.
+	 * length is equal to 'peer_grouping_count' * 5
+	 */
+	u8 slot_information;
+	u8 slot_physical_width;
+	u16 slot_pitch;
+	u8 slot_height;
+	char eos[SMBIOS_STRUCT_EOS_BYTES];
+};
+
 struct __packed smbios_type32 {
 	u8 type;
 	u8 length;
diff --git a/include/smbios_def.h b/include/smbios_def.h
index 81c5781217f..ef9cb02ed25 100644
--- a/include/smbios_def.h
+++ b/include/smbios_def.h
@@ -191,4 +191,93 @@
 #define SMBIOS_CACHE_ASSOC_64WAY	13
 #define SMBIOS_CACHE_ASSOC_20WAY	14
 
+/*
+ * System Slot
+ */
+
+/* Slot Type */
+#define SMBIOS_SYSSLOT_TYPE_OTHER	1
+#define SMBIOS_SYSSLOT_TYPE_UNKNOWN	2
+#define SMBIOS_SYSSLOT_TYPE_ISA		3	/* ISA */
+#define SMBIOS_SYSSLOT_TYPE_PCI		6	/* PCI */
+#define SMBIOS_SYSSLOT_TYPE_PCMCIA	7	/* PCMCIA */
+#define SMBIOS_SYSSLOT_TYPE_PCIE	0xa5	/* PCI Express */
+#define SMBIOS_SYSSLOT_TYPE_PCIEX1	0xa6	/* PCI Express x1 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEX2	0xa7	/* PCI Express x2 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEX4	0xa8	/* PCI Express x4 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEX8	0xa9	/* PCI Express x8 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEX16	0xaa	/* PCI Express x16 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN2	0xab	/* PCI Express Gen 2 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN2X1	0xac	/* PCI Express Gen 2 x1 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN2X2	0xad	/* PCI Express Gen 2 x2 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN2X4	0xae	/* PCI Express Gen 2 x4 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN2X8	0xaf	/* PCI Express Gen 2 x8 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN2X16	0xb0	/* PCI Express Gen 2 x16 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN3	0xb1	/* PCI Express Gen 3 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN3X1	0xb2	/* PCI Express Gen 3 x1 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN3X2	0xb3	/* PCI Express Gen 3 x2 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN3X4	0xb4	/* PCI Express Gen 3 x4 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN3X8	0xb5	/* PCI Express Gen 3 x8 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN3X16	0xb6	/* PCI Express Gen 3 x16 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN4	0xb8	/* PCI Express Gen 4 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN4X1	0xb9	/* PCI Express Gen 4 x1 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN4X2	0xba	/* PCI Express Gen 4 x2 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN4X4	0xbb	/* PCI Express Gen 4 x4 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN4X8	0xbc	/* PCI Express Gen 4 x8 */
+#define SMBIOS_SYSSLOT_TYPE_PCIEGEN4X16	0xbd	/* PCI Express Gen 4 x16 */
+
+/* Slot Data Bus Width */
+#define SMBIOS_SYSSLOT_WIDTH_OTHER	1
+#define SMBIOS_SYSSLOT_WIDTH_UNKNOWN	2
+#define SMBIOS_SYSSLOT_WIDTH_8BIT	3
+#define SMBIOS_SYSSLOT_WIDTH_16BIT	4
+#define SMBIOS_SYSSLOT_WIDTH_32BIT	5
+#define SMBIOS_SYSSLOT_WIDTH_64BIT	6
+#define SMBIOS_SYSSLOT_WIDTH_128BIT	7
+#define SMBIOS_SYSSLOT_WIDTH_1X		8
+#define SMBIOS_SYSSLOT_WIDTH_2X		9
+#define SMBIOS_SYSSLOT_WIDTH_4X		10
+#define SMBIOS_SYSSLOT_WIDTH_8X		11
+#define SMBIOS_SYSSLOT_WIDTH_12X	12
+#define SMBIOS_SYSSLOT_WIDTH_16X	13
+#define SMBIOS_SYSSLOT_WIDTH_32X	14
+
+/* Current Usage */
+#define SMBIOS_SYSSLOT_USAGE_OTHER	1
+#define SMBIOS_SYSSLOT_USAGE_UNKNOWN	2
+#define SMBIOS_SYSSLOT_USAGE_AVAILABLE	3
+#define SMBIOS_SYSSLOT_USAGE_INUSE	4
+#define SMBIOS_SYSSLOT_USAGE_NA		5
+
+/* Slot Length */
+#define SMBIOS_SYSSLOT_LENG_OTHER	1
+#define SMBIOS_SYSSLOT_LENG_UNKNOWN	2
+#define SMBIOS_SYSSLOT_LENG_SHORT	3
+#define SMBIOS_SYSSLOT_LENG_LONG	4
+#define SMBIOS_SYSSLOT_LENG_2_5INDRV	5
+#define SMBIOS_SYSSLOT_LENG_3_5INDRV	6
+
+/*  Slot Characteristics 1 */
+#define SMBIOS_SYSSLOT_CHAR_UND		1 /* BIT(0) */
+#define SMBIOS_SYSSLOT_CHAR_5V		2 /* BIT(1) */
+#define SMBIOS_SYSSLOT_CHAR_3_3V	4 /* BIT(2) */
+#define SMBIOS_SYSSLOT_CHAR_SHARED	8 /* BIT(3) */
+#define SMBIOS_SYSSLOT_CHAR_PCCARD16	16 /* BIT(4) */
+#define SMBIOS_SYSSLOT_CHAR_PCCARDBUS	32 /* BIT(5) */
+#define SMBIOS_SYSSLOT_CHAR_PCCARDZV	64 /* BIT(6) */
+#define SMBIOS_SYSSLOT_CHAR_PCCARDMRR	0x80 /* BIT(7) */
+
+/* Slot Characteristics 2 */
+#define SMBIOS_SYSSLOT_CHAR_PCIPME	1 /* BIT(0) */
+#define SMBIOS_SYSSLOT_CHAR_HOTPLUG	2 /* BIT(1) */
+#define SMBIOS_SYSSLOT_CHAR_PCISMB	4 /* BIT(2) */
+#define SMBIOS_SYSSLOT_CHAR_PCIBIF	8 /* BIT(3) */
+#define SMBIOS_SYSSLOT_CHAR_ASYNCRM	16 /* BIT(4) */
+#define SMBIOS_SYSSLOT_CHAR_FBCXL1	32 /* BIT(5) */
+#define SMBIOS_SYSSLOT_CHAR_FBCXL2	64 /* BIT(6) */
+#define SMBIOS_SYSSLOT_CHAR_FBCXL3	0x80 /* BIT(7) */
+
+/* Slot segment group number */
+#define SMBIOS_SYSSLOT_SGGNUM_UND	0
+
 #endif /* _SMBIOS_DEF_H_ */