diff options
| author | Tom Rini <[email protected]> | 2021-08-21 13:50:14 -0400 |
|---|---|---|
| committer | Tom Rini <[email protected]> | 2021-08-31 17:46:37 -0400 |
| commit | 94752f5fb121009ce42c3abecd2f30773353fb32 (patch) | |
| tree | 06b3b353267e01e6a83588d033e064fd552e0099 /include | |
| parent | 5b527c505f7d42c2ebba6192b0d55cbea257daa9 (diff) | |
mvebu: ddr: Rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
We have a number of CONFIG symbols to express the fixed size of system
memory. For now, rename CONFIG_DDR_FIXED_SIZE to CONFIG_SYS_SDRAM_SIZE
and adjust usage to match that CONFIG_SYS_SDRAM_SIZE expects the entire
size rather than MiB.
Cc: Marek Behún <[email protected]>
Cc: Stefan Roese <[email protected]>
Signed-off-by: Tom Rini <[email protected]>
Acked-by: Marek Behún <[email protected]>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/maxbcm.h | 4 | ||||
| -rw-r--r-- | include/configs/theadorable.h | 4 |
2 files changed, 6 insertions, 2 deletions
diff --git a/include/configs/maxbcm.h b/include/configs/maxbcm.h index 6028097c451..53ba64909e1 100644 --- a/include/configs/maxbcm.h +++ b/include/configs/maxbcm.h @@ -6,6 +6,8 @@ #ifndef _CONFIG_DB_MV7846MP_GP_H #define _CONFIG_DB_MV7846MP_GP_H +#include <linux/sizes.h> + /* * High Level Configuration Options (easy to change) */ @@ -61,7 +63,7 @@ /* SPL related SPI defines */ /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_DDR_FIXED_SIZE (1 << 20) /* 1GiB */ +#define CONFIG_SYS_SDRAM_SIZE SZ_1G #define CONFIG_BOARD_ECC_SUPPORT /* this board supports ECC */ #endif /* _CONFIG_DB_MV7846MP_GP_H */ diff --git a/include/configs/theadorable.h b/include/configs/theadorable.h index 746bdb74e2b..64b7f250920 100644 --- a/include/configs/theadorable.h +++ b/include/configs/theadorable.h @@ -6,6 +6,8 @@ #ifndef _CONFIG_THEADORABLE_H #define _CONFIG_THEADORABLE_H +#include <linux/sizes.h> + /* * High Level Configuration Options (easy to change) */ @@ -89,6 +91,6 @@ #define CONFIG_SPL_BOOTROM_SAVE (CONFIG_SPL_STACK + 4) /* Enable DDR support in SPL (DDR3 training from Marvell bin_hdr) */ -#define CONFIG_DDR_FIXED_SIZE (2 << 20) /* 2GiB */ +#define CONFIG_SYS_SDRAM_SIZE SZ_2G #endif /* _CONFIG_THEADORABLE_H */ |