diff options
| author | Chris Morgan <[email protected]> | 2023-02-13 16:27:39 -0600 |
|---|---|---|
| committer | Kever Yang <[email protected]> | 2023-02-28 18:07:27 +0800 |
| commit | 95ef2aaedc7adeb2dcb922c6525d5b3df1b198e5 (patch) | |
| tree | c2f1b8a2cf17dcc568c546ec58d1a7030b8e7351 /include | |
| parent | 0d61f8e5f1c0035c3ee105d940b5b8d90bcec5b0 (diff) | |
rockchip: rk3568: enable automatic power savings
It enables automatic clock gating on idle, disables the eDP phy by
default, and sets the core pvtpll ring length. It is reported this
lowers the temperature on at least one SoC by 7C.
Signed-off-by: Peter Geis <[email protected]>
Signed-off-by: Chris Morgan <[email protected]>
Reviewed-by: Kever Yang <[email protected]>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions