diff options
| author | Anton staaf <[email protected]> | 2011-10-03 13:54:58 +0000 |
|---|---|---|
| committer | Wolfgang Denk <[email protected]> | 2011-10-25 09:25:02 +0200 |
| commit | 96d21237ec2b799f60a827ea680594b7ebfdac7f (patch) | |
| tree | 759465417f77dd359f214a741446745dd2d2d5c1 /include | |
| parent | 46a6d51c827a12723e7191128fb7aab42c8f5c09 (diff) | |
tegra: define CONFIG_SYS_CACHELINE_SIZE for tegra
Signed-off-by: Anton Staaf <[email protected]>
Cc: Tom Warren <[email protected]>
Cc: Simon Glass <[email protected]>
Cc: Mike Frysinger <[email protected]>
Cc: Albert ARIBAUD <[email protected]>
Change-Id: I5c4bcfc0bfe59158ff249fe3be6640eec6d3cc76
Acked-by: Mike Frysinger <[email protected]>
Diffstat (limited to 'include')
| -rw-r--r-- | include/configs/tegra2-common.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/include/configs/tegra2-common.h b/include/configs/tegra2-common.h index 73e0f05cda9..a9c665c8d80 100644 --- a/include/configs/tegra2-common.h +++ b/include/configs/tegra2-common.h @@ -33,6 +33,8 @@ #define CONFIG_MACH_TEGRA_GENERIC /* which is a Tegra generic machine */ #define CONFIG_SYS_L2CACHE_OFF /* No L2 cache */ +#define CONFIG_SYS_CACHELINE_SIZE 32 + #define CONFIG_ENABLE_CORTEXA9 /* enable CPU (A9 complex) */ #include <asm/arch/tegra2.h> /* get chip and board defs */ |