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authorAbbas Raza <[email protected]>2013-03-25 09:13:34 +0000
committerStefano Babic <[email protected]>2013-04-03 11:26:28 +0200
commitaad4659a2fde4b69e8124d6fe8b57bf28d3c747d (patch)
tree93aa84da33f8f22c00314063e133af6b9675e1e2 /include
parent2feae93ac0cba77cda1a4e0e4af8bd73135f5371 (diff)
mmc: i.MX6: fsl_esdhc: Define maximum bus width supported by a board
Maximum bus width supported by some i.MX6 boards is not 8bit like others. In case where both host controller and card support 8bit transfers, they agree to communicate on 8bit interface while some boards support only 4bit interface. Due to this reason the mmc 8bit default mode fails on these boards. To rectify this, define maximum bus width supported by these boards (4bit). If max_bus_width is not defined, it is 0 by default and 8bit width support will be enabled in host capabilities otherwise host capabilities are modified accordingly. It is tested with a MMCplus card. Signed-off-by: Abbas Raza <[email protected]> cc: stefano Babic <[email protected]> cc: Andy Fleming <[email protected]> Acked-by: Dirk Behme <[email protected]> Acked-by: Andrew Gabbasov <[email protected]>
Diffstat (limited to 'include')
-rw-r--r--include/fsl_esdhc.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/include/fsl_esdhc.h b/include/fsl_esdhc.h
index 47d2fe4f188..0a1a0715e95 100644
--- a/include/fsl_esdhc.h
+++ b/include/fsl_esdhc.h
@@ -168,6 +168,7 @@
struct fsl_esdhc_cfg {
u32 esdhc_base;
u32 sdhc_clk;
+ u8 max_bus_width;
};
/* Select the correct accessors depending on endianess */